Three dimensional graphic processor
AssigneesHitachi, Ltd., Equator Technologies, Inc.
InventorsKen C. Chin, Masao Ishiguro, Keiji Kojima, Semyon Nisenzon
Life of this patent
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Abstract
A multimedia processor for performing three dimensional graphics processing in an integrated circuit comprises a microprocessor circuit which is configured to generate triangle set-up information corresponding to a plurality of triangles that define a three-dimensional object displayed on a screen. The screen is defined by a plurality of bins having a predetermined number of pixels. A data cache is coupled to the microprocessor and configured to store the set-up information. A three-dimensional triangle rasterizer is coupled to the data cache and configured to perform bin allocation to the triangles so as to identify all bins that intersect with a triangle on the screen.
Claims22
An integrated circuit having, a multimedia processor for performing three dimensional graphics processing comprising:
- a microprocessor circuit configured to generate triangle set-up information corresponding to a plurality of triangles that define a three dimensional object displayed on a screen, wherein said screen is defined by a plurality of bins having a predetermined number of pixels;
- a data cache directly coupled to said microprocessor configured to store said triangle set-up information;
- and
- a three dimensional triangle rasterizer directly coupled to said data cache and configured to perform bin allocation to triangles associated with said triangle set-up information so as to identify all bins that intersect with a triangle on said screen, wherein, said data cache having at least two ports allows said microprocessor and said three dimensional triangle rasterizer to access said data cache simultaneously.
An integrated circuit having, a multimedia processor for performing three dimensional graphics processing comprising:
- a microprocessor circuit configured to generate triangle set-up information corresponding to a plurality of triangles that define a three dimensional object displayed on a screen, wherein said screen is defined by a plurality of bins having a predetermined number of pixels;
- a data cache directly coupled to said microprocessor configured to store said triangle set-up information;
- and
- a three dimensional triangle rasterizer directly coupled to said data cache and configured to perform bin allocation to said triangles so as to provide pixel information for all pixels within each said triangle to said data cache, wherein said data cache having at least two ports allows said microprocessor and said three dimensional triangle rasterizer to access said data cache simultaneously.
An integrated circuit having, a multimedia processor for performing three dimensional graphics processing comprising:
- a microprocessor circuit configured to generate triangle set-up information corresponding to a plurality of triangles that define a three dimensional object displayed on a screen, wherein said screen is defined by a plurality of bins having a predetermined number of pixels;
- a data cache directly coupled to said microprocessor configured to store said triangle set-up information;
- a three dimensional triangle rasterizer directly coupled to said data cache and configured to perform bin allocation to said triangles so as to identify all bins that intersect with a triangle on said screen;
- a three dimensional texture filter coupled to said data cache and configured to perform filtering of texels received in response to said pixel information provided by said triangle rasterizer;
- and
- a video scaler coupled to said texture filter and configured to perform scaling operation for providing a scaled image to a display screen, wherein said data cache having at least two ports allows said microprocessor and said three dimensional rasterizer to access said data cache simultaneously.
Dependencies are inferred from the claim text.