US 6,608,526 B1Granted

CMOS assisted output stage

AssigneeNational Semiconductor Corporation

InventorDon R. Sauer

Life of this patent

Estimating the term…

Loading patent…

Abstract

An output stage for an operational amplifier includes a dynamically activated CMOS drive circuit that is arranged to improve the drive characteristics of the operational amplifier. The output stage includes bipolar transistors that are arranged to clamp the signal swing at an intermediary node in the operational amplifier. The bipolar transistors activate respective portions of the CMOS drive circuit based on the signal drive at the intermediary node. The CMOS driver circuit includes a p-type field effect transistor that sources additional current into the output signal when active, and an n-type field effect transistor that sinks additional current from the output terminal when active. The output stage may include additional circuitry to ensure that parasitic capacitances associated with the gates of the p-type field effect transistor and the n-type field effect transistors are discharged at appropriate times such that power consumption is reduced and high-speed operation is enhanced.

Claims16

Dependent claims

An apparatus, comprising:

a transconductance amplifier that includes a first input that is coupled to a first node, a second input that is coupled to a mid-supply voltage, and an output that is coupled to an output terminal, wherein the transconductance amplifier is arranged to provide an output signal to the output terminal in response to an input signal at the first node;
a bipolar transistor circuit that includes a first bipolar transistor and a second bipolar transistor, wherein the first bipolar transistor includes an emitter that is coupled to the first node, a base that is coupled to the mid-supply voltage, and a collector that is coupled to a second node, and wherein the second bipolar transistor includes an emitter that is coupled to the first node, a base that is coupled to the mid-supply voltage, and a collector that is coupled to a third node, wherein the first bipolar transistor is active when the input signal swings below the mid-supply voltage by a first predetermined amount, and the second bipolar transistor is active when the input signal swings above the mid-supply voltage by a second predetermined amount;
a PMOS circuit that includes a p-type transistor, wherein the p-type transistor includes a drain that is coupled to the output terminal, a gate that is coupled to the second node, and a source that is coupled to a power supply voltage, wherein the PMOS circuit is activated when the first bipolar transistor is active;
and
an NMOS circuit that includes an n-type transistor, wherein the n-type transistor includes a drain that is coupled to the output terminal, a gate that is coupled to the third node, and a source that is coupled to a circuit ground, wherein the NMOS circuit is activated when the second bipolar transistor is active.

2 more elements

An apparatus, comprising:

a transconductance amplifier that includes a first input that is coupled to a first node, a second input that is coupled to a mid-supply voltage, and an output that is coupled to an output terminal, wherein the transconductance amplifier is arranged to provide an output signal to the output terminal in response to an input signal at the first node;
an n-type bipolar transistor that includes an emitter that is coupled to the first node, a base that is coupled to the mid-supply voltage, and a collector that is coupled to a second node, wherein the n-type bipolar transistor is active when the input signal swings below the mid-supply voltage by a first predetermined amount;
a first p-type field effect transistor that includes a drain and gate that are coupled to the second node, and a source that is coupled to a power supply voltage, wherein the first p-type field effect transistor is active when the n-type bipolar transistor is active;
and
a second p-type field effect transistor that includes a gate that is coupled to the second node, a drain that is coupled to the output terminal, and a source that is coupled to the power supply voltage, wherein the second p-type field effect transistor is active when the first p-type field effect transistor is active such that additional current is provided to the output terminal from the second p-type field effect transistor when the mid-supply voltage exceeds the input signal by the first predetermined amount.

2 more elements

Dependencies are inferred from the claim text.