Live-insertion PMOS biasing circuit for NMOS bus switch
AssigneePericom Semiconductor Corp.
InventorsArnold Chow, Kwong Shing Lin
Life of this patent
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AssigneePericom Semiconductor Corp.
InventorsArnold Chow, Kwong Shing Lin
Estimating the term…
A bus switch has an n-channel bus-switch transistor between two buses and a p-channel pullup transistor. When power is disconnected from the bus switch, and one bus is hot and has a voltage above ground, this higher voltage is conducted to the gate and substrate of the p-channel pullup transistor. This biasing keeps the p-channel transistor turned off. When power is off, a connecting p-channel transistor connects the higher voltage on the hot bus to the p-channel gate node, while an inverting p-channel transistor connects the gate node to the substrate under the p-channel transistor. Inverting transistors receive an inverse enable signal and drive the gate node when power is applied, turning on the pullup transistor when the n-channel bus-switch transistor is off, and vice-versa. The gate node is fed back and applied to the gate of a source transistor that connects power to the substrate.
A bus switch comprising:
A circuit comprising:
An isolating circuit comprising:
Dependencies are inferred from the claim text.