Integrated circuit package substrate with high density routing mechanism

A semiconductor substrate, comprising:

• a set of first bonding fingers spaced across an upper surface of the substrate along a first line parallel to an area adapted to receive an integrated circuit;
• a set of second bonding fingers spaced across the upper surface along another line parallel to the first line and farther from the area adapted to receive the integrated circuit than the first bonding fingers;
• a set of co-planar first signal trace conductors dielectrically spaced below the upper surface and extending from a first point vertically aligned with respective said first bonding fingers to a second point closer to the area adapted to receive the integrated circuit than the first point;
• and
• a set of co-planar second signal trace conductors dielectrically spaced above the first signal trace conductors and extending from a third point vertically aligned with respective said second bonding fingers to a fourth point farther from the area adapted to receive the integrated circuit than the third point.

An integrated circuit package, comprising:

• a first signal conductor dielectrically spaced between an upper surface on which an integrated circuit is placed and a lower surface on which a first and second solder ball is placed, wherein the first signal conductor is adapted to carry an electrical signal from a bonded finger arranged within a first row of bonding fingers extending across the upper surface to the first solder ball;
• a second signal conductor dielectrically spaced from the first signal conductor, wherein the second signal conductor is adapted to carry an electrical signal from a bonded finger arranged within a second row of bonding fingers parallel to the first row and extending across the upper surface to- the second solder ball;
• and
• wherein the first row of bonding fingers and the first solder ball are closer to the integrated circuit than the second row of bonding fingers and the second solder ball.