Display device having thin film transistors
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hisashi Ohtani
Life of this patent
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Abstract
To provide a semiconductor device having a function equivalent to that of IGFET, an activation layer is formed by a crystal silicon film crystallized by using a catalyst element helping promote crystallization and a heating treatment is carried out in an atmosphere including a halogen element by which the catalyst element is removed, the activation layer processed by such steps is constituted by a peculiar crystal structure and according to the crystal structure, a rate of incommensurate bonds in respect of all of bonds at grain boundaries is 5 % or less (preferably, 0.3 % or less).
Claims24
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween;
- a pair of side walls formed at sides of said gate electrode,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher,
- wherein a field effect mobility of an N-channel type thin film transistor constituting said semiconductor circuit is 200 to 650 cm2/Vs, and
- wherein the field effect mobility of a P-channel type thin film transistor constituting said semiconductor circuit is 100 to 300 cm2/Vs.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher, and
- wherein said semiconductor circuit constitutes at least one of a pixel circuit, a source driver circuit, a gate driver circuit, a logic circuit, a CPU and a memory that are formed over a substrate.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween;
- a pair of side walls formed at sides of said gate electrode,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher, and
- wherein said semiconductor circuit constitutes at least one of a pixel circuit, a source driver circuit, a gate driver circuit, a logic circuit, a CPU and a memory that are formed over a substrate.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher,
- wherein a field effect mobility of an N-channel type thin film transistor constituting said semiconductor circuit is 200 to 650 cm2/Vs,
- wherein the field effect mobility of a P-channel type thin film transistor constituting said semiconductor circuit is 100 to 300 cm2/Vs, and
- wherein said semiconductor circuit constitutes at least one of a pixel circuit, a source driver circuit, a gate driver circuit, a logic circuit, a CPU and a memory that are formed over a substrate.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher, and
- wherein a sub-threshold coefficient of said semiconductor circuit is 60 to 100 mV/decade.
A display device having a semiconductor circuit, said semiconductor circuit comprising:
- a semiconductor layer formed on an insulating surface;
- source and drain regions and a channel region therebetween formed in said semiconductor layer;
- a metal silicide layer formed on each of said source and drain regions;
- and
- a gate electrode formed adjacent to said channel region with a gate insulating film interposed therebetween,
- wherein an operating speed of said semiconductor circuit is 10 GHz or higher,
- wherein sub-threshold coefficient of said semiconductor circuit is 60 to 100 mV/decade, and
- wherein said semiconductor circuit constitutes at least one of a pixel circuit, a source driver circuit, a gate driver circuit, a logic circuit, a CPU and a memory that are formed over a substrate.
Dependencies are inferred from the claim text.