Method for forming an interconnect pattern in a semiconductor device
AssigneeNEC Electronics Corporation
InventorEisuke Kodama
Life of this patent
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Abstract
A method of forming an interconnect pattern in a semiconductor device includes the steps of pre-treating an interconnect layer, forming a photoresist pattern on the interconnect layer, heat treating the interconnect layer at a temperature between 280° C. and 400° C., and patterning the interconnect layer to form an interconnect pattern. The heat treatment re-distributes Cu particles segregated in the Al—Cu alloy layer during the O2-plasma pretreatment, preventing occurrence of a short-circuit failure.
Claims10
The method for forming an interconnect pattern comprising the consecutive steps of:
- depositing an interconnect film on an underlying layer, said interconnect film including at least an Al—Cu alloy layer;
- plasma treating said interconnect film;
- heat-treating said interconnect film at a temperature between 280° C. and 400° C.;
- and
- patterning said interconnect film by using an etching mask to form the interconnect pattern, wherein said plasma treating is Ar-plasma treating at a temperature of 250° C. or lower.
A method for forming an interconnect pattern comprising the consecutive steps of:
- depositing an interconnect film on an underlying layer, said interconnect film including at least an Al—Cu alloy layer;
- initial plasma treating said interconnect film;
- heat-treating said interconnect film at a temperature between 280° C. and 400° C.;
- forming an etching mask on said interconnect film;
- testing said etching mask for misalignment or defect;
- removing any defective or misaligned etching mask by an ashing step at a temperature equal to or below 200° C., O2-plasma treating said interconnect film at temperature equal to or below 150° C. and forming another etching mask, and
- patterning said interconnect film by using said another etching mask to form the interconnect pattern.
Dependencies are inferred from the claim text.