Dry etching method and semiconductor device manufacturing method
AssigneeKabushiki Kaisha Toshiba
InventorsShoji Seta, Hideo Ichinose
Life of this patent
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Abstract
In a method for dry-etching a coating by use of reactive gas which is activated, a second insulating layer containing carbon atoms which is formed on a first insulating layer containing carbon atoms is ashed by use of a gas containing carbon atoms and at least one of oxygen atoms, nitrogen atoms and hydrogen atoms. By using the above gas, the second insulating layer containing carbon atoms which is formed on the first insulating layer which is an underlying layer can be efficiently ashed and removed without removing carbon atoms in the side surface of the grooves formed in the first insulating layer and etching the side surface thereof. Thus, the side surface of the groove formed in the first insulating layer will not be modified or deformed.
Claims20
A dry etching method comprising:
- sequentially laminating a first insulating layer containing carbon and a second insulating layer containing carbon on a substrate;
- patterning the second insulating layer into a predetermined shape;
- forming grooves in the first insulating layer by etching the first insulating layer with the second insulating layer used as a mask;
- and
- removing the second insulating layer by use of a reactive gas containing carbon atoms and at least one of oxygen atoms, hydrogen atoms and nitrogen atoms without substantially modifying or deforming a side surface and a bottom surface of the grooves in the first insulating layer.
A semiconductor manufacturing method comprising:
- sequentially laminating an insulating layer and a photoresist each containing carbon on a semiconductor substrate;
- patterning the photoresist into a predetermined shape;
- forming at least one of contact holes and interconnection grooves in the insulating layer by etching the insulating layer with the photoresist used as a mask;
- ashing and removing the photoresist by use of a gas containing carbon atoms and at least one of oxygen atoms, hydrogen atoms and nitrogen atoms, without substantially modifying or deforming a side surface of said at least one of contact holes and interconnection grooves and a bottom surface of the interconnection grooves in the first insulating layer;
- and
- depositing interconnection in at least one of the contact holes and the interconnection grooves to form interconnections therein.
A semiconductor manufacturing method comprising:
- sequentially laminating an insulating layer and a first photoresist on a semiconductor substrate;
- patterning the first photoresist into a predetermined shape;
- forming first interconnection grooves by etching the insulating layer with the first photoresist used as a mask;
- ashing and removing the first photoresist by use of a gas containing carbon atoms and at least one of oxygen atoms, hydrogen atoms and nitrogen atoms;
- burying a carbon layer in the first interconnection grooves;
- laminating a second photoresist on the insulating layer to cover the carbon layer;
- patterning the second photoresist into a predetermined shape;
- forming second interconnection grooves by etching the carbon layer with the second photoresist used as a mask;
- ashing and removing the second photoresist by use of a gas containing carbon atoms and at least one of oxygen atoms, hydrogen atoms and nitrogen atoms, without substantially modifying or deforming a side surface and a bottom surface of the second interconnection grooves in the carbon layer;
- depositing a metal interconnection layer in the second interconnection grooves to bury interconnections therein;
- forming a porous silicon oxide layer on the interlayer insulation to cover the interconnections and the carbon layer;
- and
- heating the carbon layer to remove the carbon layer from the interconnection grooves and provide a hollow around each of the interconnections.
Dependencies are inferred from the claim text.