Method of processing a defect source at a wafer edge region in a semiconductor manufacturing

A method of fixing a defect source in place in a wafer edge region for semiconductor fabrication, the wafer being defined by the wafer edge region and a wafer main region, the method comprising:

• forming an insulating layer over an entire surface of the wafer, the insulating layer having conductive contaminants in the wafer edge region;
• forming a photoresist layer on the insulating layer having the conductive contaminants;
• and
• forming a photoresist pattern by removing a portion of the photoresist layer in the wafer main region, thereby leaving a region of the wafer edge region covered by the photoresist pattern, to fix the defect source in place therein.

A method of eliminating a defect source in a wafer edge region for semiconductor fabrication, the wafer being defined by the wafer edge region and a wafer main region, the method comprising:

• forming a first insulating layer over an entire surface of the wafer;
• defining a first edge exposure of wafer (EEW) line at a predetermined region of the wafer edge region and removing the first insulating layer outside of the first EEW line;
• patterning the first insulating layer to form an opening therein in the wafer main region;
• forming a conductive layer on the resultant structure having the opening;
• forming a second insulating layer on the conductive layer;
• depositing a photoresist layer on the second insulating layer;
• defining a second EEW line in the wafer edge region and removing of the photoresist layer outside of the second EEW line to expose a region of the second insulating layer in the wafer edge region;
• etching the exposed region of the second insulating layer in the wafer edge region to form a patterned second insulating layer, thereby exposing the conductive layer in the wafer edge region;
• removing the photoresist layer;
• and
• while the patterned second insulating layer remains positioned on the non-wafer edge region, etching the exposed conductive layer in the wafer edge region using the patterned second insulating layer as an etching mask to simultaneously remove the exposed conductive layer and portions of the insulating layer in a process that leaves at least a portion of the first insulating layer intact.

A method of fixing a defect source in place in a wafer edge region for semiconductor fabrication, the wafer being defined by the wafer edge region and a wafer main region, the method comprising:

• forming a first insulating layer over an entire surface of the wafer;
• defining a first edge exposure of wafer (EEW) line in the wafer edge region from an outermost part of the wafer edge and removing the first insulating layer outside of the first EEW line;
• forming a first photoresist pattern on the wafer and the first insulating layer;
• etching the first insulating layer to form an opening for a storage node in the wafer main region by using the first photoresist pattern as an etching mask;
• removing the first photoresist pattern;
• forming a conductive layer on the resultant structure having the opening;
• forming a second insulating layer on the conductive layer;
• planarizing the second insulating layer and the conductive layer until the first insulating layer is exposed;
• forming a second photoresist layer over the resultant structure;
• defining a second EEW line in the wafer edge region and removing the second photoresist layer inside of the second EEW line, thereby leaving a region of the wafer edge region covered by the second photoresist layer to fix the defect source in place therein.