Methods of fabricating cylinder-type capacitors for semiconductor devices using a hard mask and a mold layer

A fabrication method for a cylinder-type capacitor in a semiconductor device, the fabrication method comprising:

• successively forming an etch stop layer and a mold layer on a semiconductor substrate including a cell array area and a peripheral circuit area in which a plug in a buried contact hole is formed in the cell array area;
• forming a hard mask layer pattern on the mold layer;
• etching the mold layer and the etch stop layer by using the hard mask layer pattern as an etch mask to form a mold layer pattern and an etch stop layer pattern exposing a surface of the plug;
• etching back the hard mask layer pattern to reduce a step between the hard mask layer pattern on the cell array area and the hard mask layer pattern on the peripheral circuit area;
• forming a conductive layer for a capacitor lower electrode along the walls of the buried contact hole and on a surface of the mold layer pattern;
• forming a sacrificial layer between the buried contact hole and the mold layer pattern;
• forming a cylinder-type capacitor lower electrode by etching back the conductive layer for the capacitor lower electrode;
• and
• removing the mold layer pattern and the sacrificial layer.