Loading patent…
AssigneeMitsui High-Tec, Inc.
InventorShoshi Yasunaga
Estimating the term…
A method of manufacturing semiconductor devices. The method includes the steps of: providing a lead frame assembly having oppositely facing first and second sides; mounting a first semiconductor chip on the first side of the lead frame assembly; mounting a second semiconductor chip on the second side of the lead frame assembly; electrically connecting the first semiconductor chip to a first lead on the lead frame assembly; electrically connecting the second semiconductor chip to a second lead on the lead frame assembly; applying sealing resin to the first and second sides of the lead frame assembly with the first and second semiconductor chips mounted thereon; and after applying sealing resin, separating the lead frame assembly into first and second semiconductor devices. The first semiconductor device consists of a first portion of the lead frame assembly, the first semiconductor chip thereon, and the first lead electrically connected to the first semiconductor chip. The second semiconductor device consists of a second portion of the lead frame assembly, the second semiconductor chip thereon, and the second lead electrically connected to the second semiconductor chip.
A method of manufacturing semiconductor devices, said method comprising the steps of:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Manufacture or treatment: using temporary auxiliary substrates
Manufacture or treatment: using batch processing
Manufacture or treatment: using moulds
Characterised by their shape or disposition: the semiconductor body being completely enclosed
Term ended 21 Feb 2021 (estimated)
1. Field of the Invention
This invention relates to semiconductor devices of the type having a conductive lead frame with semiconductor chips and leads mounted on one side thereof, with a sealing resin applied to the one side.
2. Background Art
FIGS. 1-6 show the steps of sequentially forming a semiconductor device, according to the present invention wherein:
FIG. 1 is a cross-sectional view of a lead frame assembly;
FIG. 2 is a view as in FIG. 1 with semiconductor chips mounted on the lead frame assembly;
The manufacturing method, according to the present invention, is described herein for chip scale packaging (CSP) technology, including exemplary SON (Small Outline Non-leaded) and QFN (Quad Flat Non-leaded) semiconductor devices. In FIG. 7, a semiconductor device, made according to the present invention, is shown at 10. The semiconductor device 10 consists of a unit lead frame 12 defining a support 14 and leads 16 spaced therearound. A semiconductor chip 18 is mounted on the upwardly facing surface 20 of the support 14 and is electrically connected to the leads 16 through conductive wires 22. The wires 22 are electrically connected to the semiconductor chip 18 at electrode pads 24. A layer of heat resistant resin 26, such as epoxy resin, is applied over one side 28 of the unit lead frame 12.
As shown in FIG. 8, a lead frame portion 30 is formed from a conductive sheet material 32. The sheet material 32 may be in the form of a strip, an endless belt, or any other suitable construction. Through pressing, etching, or other suitable process, circuit patterns are formed on individual unit lead frames 34,36,38,40 spaced at regular intervals along the length of the sheet material 32, as indicated by the double-headed arrow 41. The number and configuration of the unit lead frames, 34, 36, 38, 40 shown is intended only to be exemplary, and may vary from what is shown. The individual unit lead frames 34, 36, 38, 40 on the lead frame portion 30 are interconnected by a conductive tie bar network 42.
The individual unit lead frames 34,36,38,40 may have the same or different constructions. In the embodiment shown, they have the same construction, with exemplary unit lead frame 34 having a support 44 with conductive leads 46 projecting radially therefrom at spaced intervals around the support 44.