Design apparatus and a method for generating an implementable description of a digital system
AssigneeInteruniversitair Micro-Elecktronica Centrum (IMEC vzw)
InventorsPatrick Schaumont, Serge Vernalde, Johan Cockx
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Abstract
The present invention is a design apparatus compiled on a computer environment for generating from a behavioral description of a system comprising at least one digital system part, an implementable description for said system, said behavioral description being represented on said computer environment as a first set of objects with a first set of relations therebetween, said implementable description being represented on said computer environment as a second set of objects with a second set of relations therebetween, said first and second set of objects being part of a design environment.
Claims45
A design apparatus for generating from a behavioral description of a system comprising at least one digital system part, an implementable description for the system, the behavioral description being represented on the computer environment as a first set of objects with a first set of relations therebetween, the implementable description being represented on the computer environment as a second set of objects with a second set of relations therebetween, the first and second set of objects being part of a design environment.
A method of designing a system comprising at least one digital part, the method comprising refining wherein a behavioral description of the system is transformed into an implementable description of the system, the behavioral description being represented as a first set of objects with a first set of relations therebetween and the implementable description being represented as a second set of objects with a second set of relations therebetween, wherein refining comprises a first refining wherein the behavioral description is a data-vector model and is at least partly transformed into a data-flow model.
A method of simulating a system, the method comprising transforming a description of a system into compilable C++ code that is suitable for simulating the system as software, wherein the description is an implementable description, wherein the implementable description is transformable into synthesizable code.
A method of simulating a system, wherein a description of a system is transformed into compilable C++ code, wherein the description comprises the combination of several SFG data structures with a finite state machine description resulting in an implementable description, the implementable description being the compilable C++ code suitable for simulating the system as software.
Dependencies are inferred from the claim text.