Method and arrangement for controlling image size of integrated circuits on wafers through post-exposure bake hotplate-specific dose feedback
AssigneeInternational Business Machines Corporation
InventorCharles A. Whiting
Life of this patent
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Abstract
A method and an arrangement for the processing of wafers on post-exposure bake hotplates along multiple processing paths, each of which may result in different integrated circuit images, and adjust the exposure dose based on the path through the process, so as to render the output and resultant image size of each path identical to each other and close to a target value.
Claims8
An arrangement for controlling the image size of integrated circuits formed by an exposure dose on a semiconductor wafer conducted along multiple wafer production paths through the intermediary of post-exposure bake hot plate-specific dose feedback, said arrangement comprising:
- (a) means for measuring the image linewidth of said integrated circuits at least at one location on the surface of each said wafer conducted along each of said multiple wafer production paths;
- (b) means for plotting and correlating the image line measurement values obtained on each of said wafer production paths with previously plotted image linewidth measurements data so as to determine differentials in the formed integrated circuit image sizes along the respective wafer production paths;
- and
- (c) means for adjusting the exposure dose based on the path of at least one of said multiple wafer production paths responsive to a measured difference between said image linewidth values so as to render the output and resultant image size formed on the wafers along each of said wafer production paths substantially identical to each other;
- and
- wherein said image linewidth measuring means comprise computation means for a matrix of measured image sizes to provide a comparison with previously calibrated image size values for said multiple wafer production paths.
An arrangement for controlling the image size of integrated circuits formed by an exposure dose on a semiconductor wafer conducted along multiple wafer production paths through the intermediary of post-exposure bake hot plate-specific dose feedback, said arrangement comprising:
- (a) means for measuring the image linewidth of said integrated circuits at least at one location on the surface of each said wafer conducted along each of said multiple wafer production paths;
- (b) means for plotting and correlating the image line measurement values obtained on each of said wafer production paths with previously plotted image linewidth measurements data so as to determine differentials in the formed integrated circuit image sizes along the respective wafer production paths;
- and
- (c) means for adjusting the exposure dose based on the path of at least one of said multiple wafer production paths responsive to a measured difference between said image linewidth values so as to render the output and resultant image size formed on the wafers along each of said wafer production paths substantially identical to each other;
- and
- wherein said means for adjusting the exposure dose for each of said multiple wafer production paths forms the integrated circuit image sizes close to a specified image size target value and causes a desired image linewidth size to be subtracted from previously processed lots of wafers for each computed image linewidth size data to form a matrix of image size deviations from a nominal image size across the wafer surfaces.
A method for controlling the image size of integrated circuits formed by an exposure dose on a semiconductor wafer conducted along multiple wafer production paths through the intermediary of post-exposure bake hot plate-specific dose feedback, said method comprising:
- (a) measuring the image linewidth of said integrated circuits at least at one location on the surface of each said wafer conducted along each of said multiple wafer production paths;
- (b) plotting and correlating the image line measurement values obtained on each of said wafer production paths with previously plotted image linewidth measurements data so as to determine differentials in the formed integrated circuit image sizes along the respective wafer production paths;
- and
- (c) adjusting the exposure dose based on the path of at least one of said multiple wafer production paths responsive to a measured difference between said image linewidth values so as to render the output and resultant image size formed on the wafers along each of said wafer production paths substantially identical to each other;
- and
- wherein said image linewidth measuring step comprises computing a matrix of measured image sizes to provide a comparison with previously calibrated image size values for said multiple wafer production paths.
A method for controlling the image size of integrated circuits formed by an exposure dose on a semiconductor wafer conducted along multiple wafer production paths through the intermediary of post-exposure bake hot plate-specific dose feedback, said method comprising:
- (a) measuring the image linewidth of said integrated circuits at least at one location on the surface of each said wafer conducted along each of said multiple wafer production paths;
- (b) plotting and correlating the He line measurement values obtained on each of said wafer production paths with previously plotted image linewidth measurements data so as to determine differentials in the formed integrated circuit image sizes along the respective wafer production paths;
- and
- (c) adjusting the exposure dose based on the path of at least one of said multiple wafer production paths responsive to a measured difference between said image linewidth values so as to render the output and resultant image size formed on the wafers along each of said wafer production paths substantially identical to each other;
- and
- wherein said adjusting the exposure dose for each of said multiple wafer production paths causes the integrated circuit image sizes to be formed close to a specified image size target value;
- and
- wherein for attaining image size target value causes a desired image linewidth size to be subtracted from previously processed lots of wafers for each computed image linewidth size data to form a matrix of image size deviations from a nominal image across the wafer surfaces.
Dependencies are inferred from the claim text.