Non-disturbing programming scheme for magnetic RAM

A method to store and read data, comprising:

• providing a first field effect transistor having a first gate, a first source and a first drain;
• providing a second field effect transistor having a second gate, a second source and a second drain;
• providing first and second bit lines that are parallel to one another, first and second data lines that are parallel to said bit lines and a word line that is orthogonal to said bit lines;
• providing a storage element having a magnetization direction, first and second ends as well as a free layer and a pinned layer;
• providing a program line, having first and second ends, that crosses said storage element;
• connecting said first source to said first data line, said first gate to said word line, and said first drain to said first end of said storage element;
• further connecting said first drain to said first end of said program line;
• connecting said second end of said program line to said second drain;
• connecting said second end of said storage element to said first bit line;
• connecting said second source to said second data line;
• connecting said second gate to said second bit line;
• activating said word line and said second bit line, thereby turning on both field effect transistors, and passing a current from said first data line to said second data line through said program line whereby said free layer is magnetized in a direction;
• applying a voltage between said first data line and said first bit line causing a current to flow through said first bit line;
• and
• by measuring said current flowing through said first bit line, determining the magnetization direction of said free layer.

A memory device, comprising:

• a field effect transistor having a gate, a source and a drain;
• first and second bit lines that are parallel to one another and a word line that is orthogonal to said first and second bit lines;
• a storage element having first and second ends as well as a free layer, a longitudinal axis, and a pinned layer;
• said source being connected to ground and said gate to said word line;
• said drain being connected to a first end of said storage element through a first connecting line;
• said drain being connected to said second bit line through a second connecting line that passes directly over, and is in contact with, the longitudinal axis of said storage element in a direction that is independent of how said second connecting line is oriented;
• and
• a second end of said storage element being connected to said first bit line.

A memory device, comprising:

• a magnetic storage element having first and second ends as well as a free layer and a pinned layer;
• a first field effect transistor having a first gate, a first source and a first drain;
• a second field effect transistor having a second gate, a second source and a second drain;
• first and second bit lines, that are parallel to one another, and first and second data line that are parallel to said bit lines, and a word line that is orthogonal to said bit lines;
• a program line, having first and second ends, that crosses said storage element;
• said first source being connecting to said first data line, said first gate to said word line, and said first drain to said first end of said storage element;
• said first drain being further connected to said first end of said program line;
• said second end of said program line being connected to said second drain;
• said second end of said storage element being connected to said first bit line;
• said second source connected to said second data line;
• and
• said second gate being connected to said second bit line.