Method for performing write and read operations in a passive matrix memory, and apparatus for performing the method

A method for performing write and read operations in a matrix-addressed memory array of memory cells comprising:

• providing an electrically polarizable material exhibiting polarization remanence, wherein a logical value stored in a memory cell is represented by an actual polarization state in the memory cell and determined by detecting a charge flow to or from said memory cell in response to the application of voltages to word lines and bit lines for addressing the memory cells of the array, wherein the charge flow detection is based on detecting a charge flow component caused by a change of polarization in said polarizable material;
• and
• performing write and read operations under control of a control circuit device, where said control circuit device controls the read and write voltages of the memory cells using dynamic charge response information from chosen memory cells, where the control circuit limits the degree of polarization in the polarizable material during each write and read cycle to a value dependent on the recorded dynamic charge response of the chosen memory cells, and controlling the write and read operations according to an actual instantaneous charge response information with said value ranging from zero to an upper limit equal to the saturation magnitude of the polarization and being consistent with predetermined criteria for a reliable detection of a logic state of a memory cell, further
• having an addressing history for the memory in terms of recorded exposure of the memory cells to fatigue and imprint-inducing factors and/or acquiring the dynamic charge response information from one or more reference cells or pairs of reference cells and/or one or more memory cells or pairs of memory cells in the matrix, and establishing the predetermined detection criteria and/or the acquired dynamic charge response information as basis for control criteria in order to adjust the characteristics of the voltage pulse or pulses.

Apparatus for performing write and read operations, said apparatus including:

• at least one matrix-addressed array of memory cells of an electrically polarizable material exhibiting polarization remanence,
• wherein a logical value stored in a memory cell is represented by the polarization state in individual, separately selectable memory cells, and determined by detecting a charge flow to or from said memory cells in response to an application of voltages to the word and bit lines for addressing the memory cells of an array, the charge flow detection being based on a charge flow component caused by a change of polarization in said polarizable material;
• and
• circuitry for recording a dynamic charge response of one or more memory cells during a write or read operation and using the dynamic charge response to adjust the application of voltages to limit a degree of polarization change in said polarizable material during each read and write cycle to a defined value, and controlling said write and read operations, according to an actual instantaneous charge response, with the value ranging from zero to an upper limit equal to the saturation magnitude of the polarization.

Apparatus for performing write and read operations, said apparatus including:

• at least one matrix-addressed array of memory cells of an electrically polarizable material exhibiting polarization remanence,
• wherein a logical value stored in a memory cell is represented by the polarization state in individual, separately selectable memory cells, and determined by detecting a charge flow to or from said memory cells in response to an application of voltages to the word and bit lines for addressing the memory cells of an array, the charge flow detection being based on a charge flow component caused by a change of polarization in said polarizable material;
• and
• circuitry for recording a dynamic charge response of one or more memory cells during a write or read operation and adjusting said application of voltages to limit a degree of polarization change in said polarizable material during each read and write cycle to a defined value, and a circuit for controlling said write and read operations, according to an actual instantaneous charge response, with the value ranging from zero to the saturation magnitude of the polarization,
• wherein said memory array comprises reference cells with known logic states.

Apparatus for performing read operations, said apparatus including:

• at least one matrix-addressed array of memory cells of an electrically polarizable material exhibiting polarization remanence,
• wherein a logical value stored in a memory cell is represented by the polarization state in individual, separately selectable memory cells, and determined by detecting a charge flow to or from said memory cells in response to an application of voltages to the word and bit lines for addressing the memory cells of an array, the charge flow detection being based on a charge flow component caused by a change of polarization in said polarizable material;
• and
• circuitry for recording a dynamic charge response of one or more memory cells during a read operation and using the dynamic charge response to adjust the application of voltages to limit a degree of polarization change in said polarizable material during each read cycle to a defined value, and a circuit for controlling said read operations, according to an actual instantaneous charge response, with the value ranging from zero to an upper limit equal to the saturation magnitude of the polarization.