Analog to digital converters based on transconveyance amplifiers

An analog-to-digital converter for producing a digital representation of an analog signal, the analog-to-digital converter comprising the following:

• a first transconveyance amplifier having a first input terminal and first and second output terminals, the first input terminal being coupled to a first input signal source;
• a second transconveyance amplifier having a first input terminal and first and second output terminals, the first input terminal being coupled to a second input signal source;
• a first intermediate capacitor having a first terminal and a second terminal, the first terminal being coupled to the first output terminal of the first transconveyance amplifier and the second terminal being coupled to the second output terminal of the second transconveyance amplifier;
• and
• a second intermediate capacitor having a first terminal and a second terminal, the first terminal being coupled to the second output terminal of the first transconveyance amplifier and the first output terminal of the second transconveyance amplifier.

An analog-to-digital converter for producing a digital representation of an analog signal, the analog-to-digital converter comprising the following:

• a first transconveyance amplifier having first and second input terminals and first and second output terminals, the first input terminal being coupled to a first input signal source and the second input terminal being coupled to the analog signal;
• a second transconveyance amplifier having first and second input terminals and first and second output terminals, the first input terminal being coupled to the analog signal and the second input terminal being coupled a second signal source;
• a third transconveyance amplifier having first and second input terminals and first and second output terminals, the first input terminal being coupled to the analog signal and the second input terminal being coupled to the first input signal source;
• a fourth transconveyance amplifier having first and second input terminals and first and second output terminals, the first input terminal being coupled to the second signal source and the second input terminal being coupled to the analog signal.

A method for generating a digital value in an analog-to-digital converter that includes a sequential array of transconveyance amplifiers each having at least an input terminal and an output terminal, the method comprising the following:

• an act of generating a first output signal at an output terminal of a first transconveyance amplifier by amplifying a difference between an input signal and a first reference signal;
• an act of generating a second output signal at an output terminal of a second transconveyance amplifier by amplifying the difference between an input signal and a second reference signal;
• an act of a decision circuit detecting the voltage on an input terminal that is capacitively coupled to the output terminal of the first transconveyance amplifier and capacitively coupled to the output terminal of the second transconveyance amplifier;
• and
• an act of the decision circuit generating the digital value based on the detected voltage.

A sampling circuit for use in an analog-to-digital converter for producing a digital representation of an analog electrical signal, the sampling circuit comprising the following:

• a first switch having a first terminal and a second terminal, the first terminal being coupled to an analog input signal;
• a second switch having a first terminal and a second terminal, the first terminal being coupled to a reference voltage;
• a first capacitor having a first terminal and a second terminal, the first terminal being coupled to the second terminal of the first switch;
• a second capacitor having a first terminal and a second terminal, the first terminal being coupled to the second terminal of the third switch;
• and
• a third switch having a first terminal and a second terminal, the first terminal being coupled to the second terminal of the first switch and coupled to the first terminal of the first capacitor and the second terminal being coupled to the first terminal of the second switch and coupled to the first terminal of the second capacitor.

A method for sampling analog input signals that appear on an input terminal of an analog-to-digital converter, the analog-to-digital converter having a coarse bank of charge transfer amplifiers, each charge transfer amplifier in the coarse bank having the input terminal of the analog-to-digital converter as a first coarse input terminal and a second coarse input terminal coupled to a coarse reference voltage source, each charge transfer amplifier in the coarse bank configured to operate in an amplifier cycle having a reset phase, a precharge phase, and an amplify phase, the coarse bank of charge transfer amplifiers configured to convert an analog input signal into a plurality of coarse digital values, the analog-to-digital converter also having a fine bank of charge transfer amplifiers, each charge transfer amplifier in the fine bank having the input terminal of the analog-to-digital converter as a first fine input terminal and a second fine input terminal coupled to a fine reference voltage source, each charge transfer amplifier in the fine bank being coupled to one or more input capacitors and each being configured to operate in an amplifier cycle having a reset phase, a precharge phase, and an amplify phase, the fine bank of charge transfer amplifiers being configured to subrange into the plurality of coarse digital values and convert the analog input signal into one or more fine digital values that are subsequently combined with the coarse digital values, the method comprising the following:

• an act of sampling an analog input signal at the first coarse input terminals;
• an act of sampling the analog input signal at the first fine input terminals essentially simultaneously to sampling the analog input signal at the first coarse input terminals;
• an act of holding the analog input signal in the one or more input capacitors coupled to each charge transfer amplifier in the fine bank until a fine reference signal determined by the coarse bank settles for a predetermined time;
• an act of sampling the fine reference signal applied at a second fine input terminal;
• and
• an act of providing the difference of the analog input signal and the fine reference signal at an output terminal of a charge transfer amplifier in the fine bank of charge transfer amplifiers.

A method for reducing the time for an analog-to-digital converter having an input terminal to produce a digital representation of an analog electrical signal, the analog-to-digital converter having a coarse bank of charge transfer amplifiers, each charge transfer amplifier in the coarse bank having the input terminal of the analog-to-digital converter as a first coarse input terminal and a second coarse input terminal coupled to a coarse reference voltage source and each configured to operate in an amplifier cycle having a reset phase, a precharge phase, and an amplify phase, the coarse bank of charge transfer amplifiers configured to convert an analog input signal into a plurality of coarse digital values, the analog-to-digital converter also having a fine bank of charge transfer amplifiers, each charge transfer amplifier in the fine bank having the input terminal of the analog-to-digital converter as a first fine input terminal and a second fine input terminal coupled to a fine reference voltage source, each charge transfer amplifier in the fine bank being coupled to one or more input capacitors and each configured to operate in an amplifier cycle having a reset phase, a precharge phase, and an amplify phase, the fine bank of charge transfer amplifiers configured to subrange into the plurality of coarse digital values and convert the analog input signal into one or more fine digital values that are subsequently combined with the coarse digital values, the analog-to-digital converter having a clock that generates clock partitions, the method comprising the following:

• an act of a charge transfer amplifier included in the coarse bank of charge transfer amplifiers operating in the amplify phase for a single clock partition to generate a coarse digital value by amplifying the difference in an analog input signal and a coarse reference signal;
• an act of allowing a fine reference voltage to settle for at least three clock partitions;
• and
• an act of a charge transfer amplifier included in the fine bank of charge transfer amplifiers operating in the amplify phase for a first clock partition to amplify the difference in an analog signal and the fine reference voltage to generate a fine digital value.

A comparator for producing a digital value on a digital output terminal that is related to the magnitude of a differential input voltage applied between first and second input terminals of the comparator, the comparator comprising the following:

• a transconveyance amplifier having the first input terminal as first amplifier input terminal, having the second input terminal as a second amplifier input terminal, having a first amplifier output terminal, and having a second amplifier output terminal;
• a latch with a first latch input terminal, a second latch input terminal, and the digital output terminal as a latch output terminal;
• a first switch having a first terminal coupled to the first amplifier output terminal and having a second terminal coupled to the first latch input terminal, first switch electrically coupling the first amplifier output terminal to the first latch input terminal during the amplify phase of the charge transfer amplifier;
• a second switch having a first terminal coupled to the second amplifier output terminal and having a second terminal coupled to the second latch input terminal, the second switch electrically coupling the second amplifier output terminal to the second latch input terminal during the amplify phase of the charge transfer amplifier;
• a third switch having a first terminal coupled to an equalization voltage source and having a second terminal coupled to the first latch input terminal, the third switch electrically coupling the equalization voltage source to the first latch input terminal during the precharge phase of the charge transfer amplifier;
• and
• a fourth switch having a first terminal coupled to the equalization voltage source and having a second terminal coupled to the second latch input terminal, the fourth switch electrically coupling the equalization voltage source to the second latch input terminal during the precharge phase of the charge transfer amplifier.