US 6,605,993 B2 · Operational amplifier circuit

Abstract

An operational amplifier circuit includes a first differential pair, which includes first and second transistors, and a second differential pair, which includes third and fourth transistors. A fifth transistor is connected to the first and third transistors. A sixth transistor is connected to the second and fourth transistors. A first current source is connected to the first differential pair to provide a first bias current. A second current source is connected to the second differential pair to provide a second bias current. A third current source is connected to the fifth transistor to provide a third bias current. A fourth current source is connected to the sixth transistor provide a fourth bias current. A control circuit controls the first to fourth current sources such that the sum of the first and second bias currents is constant and the second to fourth bias currents become substantially equal.

Claims29

Dependent claims

An operational amplifier circuit comprising:

a first differential pair including a first transistor responsive to a first input voltage and a second transistor responsive to a second input voltage;
a second differential pair including a third transistor responsive to the first input voltage and a fourth transistor responsive to the second input voltage;
a fifth transistor connected to the first and third transistors;
a sixth transistor connected to the second and fourth transistors;
a first current source, which is connected to the first differential pair, for supplying a first bias current to the first differential pair;
a second current source, which is connected to the second differential pair, for supplying a second bias current to the second differential pair;
a third current source, which is connected to the fifth transistor, for supplying a third bias current to the fifth transistor;
a fourth current source, which is connected to the sixth transistor, for supplying a fourth bias current to the sixth transistor;
and
a control circuit, which is connected to the first to fourth current sources, for receiving the first and second input voltages and controlling the first to fourth current sources such that the sum of the first and second bias currents is constant and the second to fourth bias currents become substantially equal.

7 more elements

An operational amplifier circuit comprising:

a first differential pair for receiving a first bias current and operating in response to first and second input voltages;
a second differential pair for receiving a second bias current and operating in response to the first and second input voltages;
a first current source connected to the first differential pair;
a second current source, which is connected to the second differential pair, for producing the second bias current;
and
a control circuit, which is connected to the first and second current sources, for controlling the first current source such that the first current source produces a constant current, wherein the control circuit produces the first bias current at a node between the first differential pair and the first current source by adding a current that is substantially equal to the second bias current to the constant current in accordance with one of the first and second input voltages.

3 more elements

An operational amplifier circuit comprising:

a first transistor the drain of which receives a first current;
a first resistor element connected between the gate and the source of the first transistor;
a second transistor, the gate of which is connected to the drain of the first transistor and the source of which is connected to the gate of the first transistor;
a differential pair including first and second differential transistors, the sources of which receive a second current originating from the drain current of the second transistor and the gates of which respectively receive first and second input signals;
second and third resistor elements respectively connected to the drains of the first and second differential transistors;
a third transistor, the gate of which is connected to a first node between a first terminal of the second resistor element and the drain of the first differential transistor, wherein the source of the third transistor is connected to a second terminal of the second resistor element, and a third current, which is related to the first current, is generated at the drain of the third transistor;
a first output transistor, the gate of which is connected to a second node between a third terminal of the third resistor element and the drain of the second differential transistor, wherein the source of the first output transistor is connected to a fourth terminal of the third resistor element, and a fourth current, which is related to the first current, is generated at the drain of the first output transistor;
a fourth resistor element connected to the drain of the third transistor;
and
a second output transistor, the gate of which is connected to a third node between the drain of the third transistor and the fourth resistor element, wherein the source of the second output transistor is connected to the fourth resistor element, and a fifth current, which corresponds to a gate voltage of the third transistor, is generated at the drain of the second output transistor based on the third current.

7 more elements

A semiconductor device including an operational amplifier circuit, wherein the operational amplifier circuit comprises:

a first transistor, the drain of which receives a first current;
a first resistor element connected between the gate and the source of the first transistor;
a second transistor, the gate of which is connected to the drain of the first transistor and the source of which is connected to the gate of the first transistor;
a differential pair including first and second differential transistors, the sources of which receive a second current originating from the drain current of the second transistor and the gates of which respectively receive first and second input signals;
second and third resistor elements respectively connected to the drains of the first and second differential transistors;
a third transistor, the gate of which is connected to a first node between a first terminal of the second resistor element and the drain of the first differential transistor, and the source of which is connected to a second terminal of the second resistor element, wherein a third current, which is related to the first current, is generated at the drain of the third transistor;
a first output transistor, the gate of which is connected to a second node between a third terminal of the third resistor element and the drain of the second differential transistor, and the source of which is connected to a fourth terminal of the third resistor element, wherein a fourth current, which is related to the first current, is generated at the drain of the first output transistor;
a fourth resistor element connected to the drain of the third transistor;
and
a second output transistor, the gate of which is connected to a third node between the drain of the third transistor and the fourth resistor element, and the source of which is connected to the fourth resistor element, wherein a fifth current, which corresponds to a gate voltage of the third transistor, is generated at the drain of second output transistor the based on the third current.

7 more elements

Dependencies are inferred from the claim text.

Operational amplifier circuit

Life of this patent

Operational amplifier circuit

Life of this patent

Abstract

Claims29