Charge pump ripple reduction
AssigneeIntel Corporation
InventorsRavi P. Annavajjhala, Mary Frances Therese B. Yuvienco
Life of this patent
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Abstract
Circuits reduce the ripple in charge pump output by staggering the times at which charge is drawn from the pump. In one embodiment, the outputs of a two-array high current pump are staggered by multiplexing two pairs of clock inputs, the second pair being 180 degrees out of phase with the first clock input pair. When an EEPROM is in a programming or erase algorithm, multiplexers switch the clock inputs to the second array, effectively inverting the input clock signals. After switching, the output from the second array is 180 degrees out of phase with the output from the first array. The peak-to-peak ripple in the charge pump output is thereby reduced to about 400 mV or less.
Claims29
A circuit comprising:
- at least two charge pump arrays each having:
- first and second stages connected in series, the first stage receiving a first set of clock signals and the second stage receiving a second set of clock signals that are out of phase with the first set of clock signals, and
- an output, wherein the outputs are electrically connected to each other so as to provide an aggregate supply voltage;
- and
- a timing circuit connected to the arrays controlling whether the arrays dump their charge to the output a synchronously or synchronously according to a control signal.
A circuit comprising:
- at least two charge pump arrays each having an output, wherein the outputs are electrically connected to each other so as to provide an aggregate supply voltage;
- and
- a multiplexing circuit having an input electrically connected to at least two clocks signals and an output electrically connected to at least one of said arrays, wherein said multiplexing circuit outputs a first oscillating clock signal when enabled and a second oscillating clock signal when disabled;
- wherein the arrays dump charge asynchronously in one of said enabled or disabled conditions.
A method comprising:
- generating a plurality of control signals;
- outputting a first set of the control signals to a first charge pump array;
- selectively outputting either the first set of the control signals or a second set of the control signals to a second charge pump array according to a selection signal;
- and
- generating a pumped supply voltage in response to the first set of control signals and the second set of control signals.
A method comprising:
- generating control signals;
- selectively switching at least two of the control signals;
- outputting the control signals and the switched control signals to a plurality of charge pump arrays;
- generating a pumped supply voltage in response to the control signals and switched control signals;
- and
- dumping charge onto an output line from the last stage in each of the arrays,
- wherein in a first condition the charge is dumped from each of the arrays substantially simultaneously and in a second condition the charge is dumped from each of the arrays substantially asynchronously.
Dependencies are inferred from the claim text.