Surface mount type semiconductor package and manufacturing method therefor
AssigneeOki Electric Industry Co., Ltd.
InventorShigeru Yamada
Life of this patent
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Abstract
A conductive layer is formed on a dielectric substrate on which a semiconductor chip is mounted, and holes are formed passing through the layer and the substrate. After this, before the through-holes are filled with a conductive material, the conductive layer is patterned by patterning. By patterning, conductive patterns are formed from the conductive layer. After the conductive patterns are formed, the through-holes are filled with a conductive material while both ends of the holes are open, to form conductors. In the above process, one open end of each through-hole is used as a leak hole to discharge air bubbles, thus suppressing the occurrence of voids caused by bubbles, and an increase in electrical resistance in the conductors by voids can be prevented.
Claims11
A surface mount type semiconductor, comprising:
- a semiconductor chip having a connection terminal;
- a dielectric substrate with the semiconductor chip mounted on a top surface thereof, said top surface of said dielectric substrate being provided with a conductive pattern that is connected to said connection terminal of said semiconductor chip, said dielectric substrate also having a through-hole passing through it from said top surface to a bottom surface of said dielectric substrate;
- and
- a conductor extending through said through-hole and filling up said through-hole, with a top end of said conductor being connected to said conductive pattern and a bottom end of said conductor serving as a connection end to a mother board disposed under said bottom surface of said dielectric substrate, said semiconductor chip and said conductive pattern being encapsulated by a resin on said dielectric substrate,
- wherein said conductive pattern has a hole with an inner surface,
- wherein said top end of said conductor has a portion that extends through said hole in said conductive pattern and is electrically connected to said inner surface thereof,
- wherein said top end of said conductor has another portion that overlaps an annular region of a top side of said conductive pattern around said hole in said conductive pattern, providing a flange that is electrically connected to said top side of said conductor pattern, and
- wherein said hole in said conductive pattern has a smaller diameter than at least a portion of said through-hole in said dielectric substrate.
A surface mount type semiconductor, comprising:
- dielectric substrate having an upper surface and a lower surface, the substrate additionally having a first hole passing from the upper surface to the lower surface of the substrate, the first hole having an upper end and a predetermined diameter at its upper end;
- a conductive pattern on the upper surface of the substrate, the conductive pattern having a second hole that communicates with the first hole, the second hole having a diameter that is smaller than the diameter of the first hole at its upper end;
- a semiconductor chip mounted on the upper surface of the substrate and electrically connected to the conductive pattern;
- and
- a conductor made of a conductive material extending through the first and second holes, the conductor contacting the conductive pattern at an inner surface of the second hole and also at an annular region of a lower surface of the conductive pattern around the second hole.
A surface mount type semiconductor, comprising:
- a dielectric substrate having an upper surface and a lower surface, the substrate additionally having a first hole passing from the upper surface of the substrate to the lower surface of the substrate, the first hole having a lower portion with a predetermined diameter and an upper portion with a diameter that is smaller than the diameter of the lower portion;
- a conductive pattern formed on the upper surface of the substrate, the conductive pattern having a second hole that communicates with the first hole, the second hole having a diameter that is substantially the same as the diameter of the upper portion of the first hole;
- a semiconductor chip mounted on the upper surface of the substrate and electrically connected to the conductive pattern;
- and
- a conductor made of a conductive material extending through the first and second holes,
- wherein the conductor has an upper portion that overlaps an annular region of a top side of the conductive pattern around the second hole, providing a flange that is electrically connected to the top side of the conductive pattern, and the conductor also has a lower portion that provides an external connection terminal at the other end.
Dependencies are inferred from the claim text.