US 6,605,865 B2Granted

Semiconductor package with optimized leadframe bonding strength

AssigneeAmkor Technology, Inc.

InventorsJung Ho Jeong, Jong Chul Hong, Eun Deok Kim

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Abstract

A semiconductor package including a sealing part which is bonded to a lead frame. The lead frame is formed to include portions of reduced thickness for purposes of providing maximum crack prevention during a singulation process involved in the manufacture of the semiconductor package. Additionally, the lead frame and the sealing part are sized and configured relative to each other so as to maximize the contact area therebetween, thus having the effect of improving the bonding strength between the lead frame and the sealing part. This increased contact area between the sealing part and the lead frame also maximizes the lengths of those passages susceptible to moisture permeation, thus minimizing such moisture permeation potential.

Claims16

Dependent claims

A semiconductor package comprising:

a chip mounting pad;
a semiconductor chip attached to the chip mounting pad;
a plurality of leads extending at least partially about the chip mounting pad in spaced relation thereto, each of the leads defining:
a generally planar first lead surface;
a generally planar second lead surface disposed in opposed relation to the first lead surface;
and
a generally planar third lead surface disposed in opposed relation to the first lead surface and oriented closer to the chip mounting pad than the second lead surface;
each of the leads having a first lead thickness between the first and second lead surfaces which exceeds a second lead thickness between the first and third lead surfaces
at least one conductive wire electrically connected to and extending between the semiconductor chip and a respective one of the first lead surfaces of the leads;
and
a sealing part defining a top surface, a bottom surface disposed in opposed relation to the top surface, and an upper shoulder surface disposed in opposed relation to the bottom surface and recessed relative to the top surface, the sealing part partially encapsulating the chip mounting pad, the leads, the semiconductor chip and the conductive wire such that the second lead surface of each of the leads is exposed in the bottom surface and the first lead surface of each of the leads is completely covered by the sealing part.

8 more elements

A semiconductor package comprising:

a chip mounting pad;
a plurality of leads extending at least partially about the chip mounting pad in spaced relation thereto, each of the leads defining:
a generally planar first lead surface;
a generally planar second lead surface disposed in opposed relation to the first lead surface;
and
a generally planar third lead surface disposed in opposed relation to the first lead surface and oriented closer to the chip mounting pad than the second lead surface;
each of the leads having a first lead thickness between the first and second lead surfaces which exceeds a second lead thickness between the first and third lead surfaces;
a semiconductor chip attached to the chip mounting pad and electrically connected to at least one of the leads;
and
a sealing part defining a top surface, a bottom surface disposed in opposed relation to the top surface, and an upper shoulder surface disposed in opposed relation to the bottom surface and recessed relative to the top surface, the sealing part partially encapsulating the chip mounting pad, the leads, and the semiconductor chip such that the second lead surface of each of the leads is exposed in the bottom surface and the first lead surface of each of the leads is completely covered by the sealing part.

7 more elements

Dependencies are inferred from the claim text.