Shallow junction formation

An integrated circuit, the improvement comprising junctions in the integrated circuit formed according to a method comprising:

• growing a gate dielectric layer on the semiconductor substrate,
• depositing a gate electrode layer on the gate dielectric layer,
• forming a sacrificial layer on the gate electrode layer,
• patterning the sacrificial layer with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer,
• etching the exposed portions of the sacrificial layer to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer,
• etching the exposed portions of the gate electrode layer to expose portions of the gate dielectric layer and form a gate electrode having exposed vertical faces,
• impregnating the sacrificial layer and the exposed portions of the gate dielectric layer with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer, using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode,
• exposing the impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode and thereby covering the vertical faces of the gate electrode with oxide sidewalls, but not causing significant oxide growth under the impregnated sacrificial layer and the impregnated exposed portions of the gate dielectric layer, and
• impregnating a second species through the impregnated exposed portions of the gate dielectric layer into portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer to form junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer.

An integrated circuit, the improvement comprising junctions in the integrated circuit formed according to a method of forming oxide sidewalls on exposed vertical sidewalls of a gate electrode without forming additional oxide on a top of the gate electrode or on active areas of a semiconductor substrate on which the gate electrode is disposed, the method comprising:

• growing a gate dielectric layer on the semiconductor substrate,
• depositing a gate electrode layer on the gate dielectric layer,
• forming a sacrificial layer on the gate electrode layer,
• patterning the sacrificial layer with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer,
• etching the exposed portions of the sacrificial layer to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer,
• etching the exposed portions of the gate electrode layer to expose portions of the gate dielectric layer that overly the active areas of the semiconductor substrate, and also to form the gate electrode and the exposed vertical faces of the gate electrode,
• impregnating the sacrificial layer and the exposed portions of the gate dielectric layer with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer, using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode,
• exposing the impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode and thereby covering the vertical faces of the gate electrode with oxide sidewalls, but not causing significant oxide growth under the impregnated sacrificial layer, and the impregnated exposed portions of the gate dielectric layer that overly the active areas of the semiconductor substrate, and
• impregnating a second species through the impregnated exposed portions of the gate dielectric layer into the active areas of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer to form junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer.