Multi-level type nonvolatile semiconductor memory device

A method of reading data stored in the memory cells in a nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells comprising a semiconductor substrate of one type of electric conduction, a source region and a drain region of the opposite type of electric conduction formed in said semiconductor substrate, an electric charge-capturing film formed on a channel region between said source region and said drain region, and a gate electrode formed on said charge-capturing film, wherein said electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, said method of reading data stored in said memory cells comprising:

• a step of applying a first predetermined voltage to said gate electrode in order to judge to which one of the two voltage ranges the memory state of the memory cell belongs, said two voltage ranges being obtained by dividing into two a plurality of continuous ranges of threshold voltages that are set depending upon the values of the data that are read out;
• a step of judging whether a threshold voltage is higher than said first voltage or not upon detecting a current that flows between said source region and said drain region;
• a step of specifying a voltage range to which the memory state of said memory belongs based upon said judged result;
• a step of applying a second predetermined voltage to said gate electrode in order to judge to which one of the two voltage ranges the memory state of said memory cell belongs, said two voltage ranges being obtained by dividing said specified voltage into two;
• a step of judging whether a threshold voltage is higher than said second voltage or not upon detecting a current that flows between said source region and said drain region;
• and
• a step of specifying a voltage range to which the memory state of said memory belongs based upon said judged result;
• said steps being repeatively executed until a sole voltage range is specified to which the memory state of said memory cell belongs.