Ferroelectric memory and its method of fabrication
AssigneeSamsung Electronics Co., Ltd.
InventorSung-Yung Lee
Life of this patent
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Abstract
A ferroelectric memory device has a lower electrode, ferroelectric layer and a first portion of an upper electrode that are formed as a stack over a semiconductor substrate. Sidewalls of the stack are covered with a second portion of the upper electrode. An insulating spacer is disposed between the lower electrode and the second portion of the upper electrode. The second portion of the upper electrode is electrically connected to the first portion of the upper electrode yet electrically insulated by the insulating spacer from the lower electrode. At least one of the first and second portions of the upper electrode is formed of a hydrogen barrier layer to protect the ferroelectric layer of the stack from hydrogen ions.
Claims9
A ferroelectric memory comprising:
- a substrate;
- an insulating layer on the substrate;
- a lower electrode-ferroelectric-upper electrode stack on the insulating layer;
- and
- an insulating spacer covering at least a portion of the sidewalls of the stack, the portion including the lower electrode of the stack,
- wherein the upper electrode includes an extending portion disposed over and covering the insulating spacer, the extending portion being electrically insulated from the lower electrode.
A ferroelectric memory comprising:
- a substrate;
- an insulating layer on the substrate;
- a capacitor stack comprising:
- a lower electrode;
- a ferroelectric layer formed on the lower electrode;
- and
- an upper electrode formed on the ferroelectric layer;
- and
- an anisotropically-etched insulating spacer formed on sidewalls of the capacitor stack,
- wherein the upper electrode comprises a portion overlying and covering the anisotropically-etched insulating spacer.
Dependencies are inferred from the claim text.