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US 6,605,536 B2Granted
Treatment of low-k dielectric films to enable patterning of deep submicron features
AssigneeTexas Instruments Incorporated
InventorsMona Eissa, Guoqiang Xing, Kenneth D. Brennan, Hyesook Hong
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Abstract
Treating a low-k dielectric layer (104) using a highly oxidizing wet solution (e.g., H2SO4) to improve patterning. Resist poisoning occurs due to an interaction between low-k films (104), such as OSG, and DUV resist (130,132). The wet treatment is performed to either pre-treat a low-k dielectric (104) before forming the pattern (130,132) or during a rework of the pattern (130,132) to reduce resist poisoning.
Claims7
A method of fabricating an integrated circuit having copper metal interconnects, comprising the steps of:
- forming an interlevel dielectric (ILD) over a semiconductor body;
- forming an intrametal dielectric (IMD) over the ILD;
- oxidizing said IMD with a highly oxidizing wet solution;
- forming a via resist pattern over said IMD;
- etching a via in said IMD and ILD using said via resist pattern;
- at least partially filling said via with a material;
- forming a trench resist pattern over said IMD;
- etching a trench in said IMD using said trench resist pattern;
- removing said trench resist pattern and said material in said via;
- and
- forming a copper interconnect in said via and said trench.
8 more elements
Dependencies are inferred from the claim text.