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US 6,605,480 B2Granted
Wafer level packaging for making flip-chips
AssigneeChipMOS Technologies Inc.
InventorsAn-Hong Liu, Yuan-Ping Tseng, Y. J. Lee
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Abstract
A wafer level packaging process for making flip-chips and integrated circuits formed are proposed. The process comprises in turn, providing a wafer, forming a protective material, bumping the wafer, removing the protective material, probing the wafer, laser repairing, and dicing the wafer. The laser repairing step is after bumping step. The protective material such as photoresist or metal layer is filled into the depression portions above the fuses for temporary protection of the fuses during bumping.
Claims8
A wafer level packaging process for making flip-chips comprising the steps of:
- providing a wafer including a plurality of chips integrally, wherein each chip has a plurality of bonding pads, a plurality of fuses, and at least an insulating layer, the insulating layer exposes the bonding pads and has depression portions corresponding to the fuses;
- forming a protective material completely filling the depression portions prior to a bumping step;
- bumping on the bonding pads after forming the protective material so as to form a plurality of electrical bumps on the bonding pads of the wafer having the protective material;
- removing the protective material on the wafer with bumps;
- probing the wafer for analyzing if there are fail chips required to be repaired;
- laser repairing the repairable fail chips by means of laser beam striking the fuses without the protective material in the corresponding depression portions;
- and
- dicing the wafer for singulating the chips.
5 more elements
Dependencies are inferred from the claim text.