US 6,604,853 B2 · Accelerated thermal stress cycle test

Abstract

An accelerated thermal stress cycle test which can be conducted in a significantly reduced test time compared to the conventional test is provided. The test is carried out in a cluster of reaction chambers that includes a CVD chamber and a cool-down chamber such that a pre-processed wafer can be heated from room temperature to at least 350° C. in an inert gas in about 2 min., and then cooled down to not higher than 70° C. in a cool-down chamber in less than 30 sec. The heating and cooling steps can be repeated between 3 and 7 times to reveal any defect formation caused by the thermal stress cycle test. Typical defects are metal film peeling from insulating dielectric material layer or void formation.

Claims18

Dependent claims

An accelerated thermal stress cycle test comprising the steps of:

providing a cluster of reaction chambers including at least one chemical vapor deposition (CVD) chamber and at least one cool-down chamber;
heating a pre-processed wafer to at least 350° C. in less than 2 minutes by positioning said wafer in one of said at least one CVD chambers in an inert gas;
cooling said pre-processed wafer to a temperature not higher than 70° C. in less than 30 seconds by moving said wafer from said at least one CVD chamber to one of said at least one cool-down chambers;
repeating sequentially said heating and cooling steps for at least three times;
and
determining any defect caused by said repeated heating and cooling steps.

3 more elements

Dependencies are inferred from the claim text.

Accelerated thermal stress cycle test

Life of this patent

Accelerated thermal stress cycle test

Life of this patent

Abstract

Claims18