Method of designing wiring for power sources in a semiconductor chip, and a computer product

A method of designing wiring for power sources in a semiconductor chip comprising:

• determining a shape of a logic-undecided functional block;
• determining a power source terminal position of the logic-undecided functional block;
• installing the logic-undecided functional block on the semiconductor chip;
• installing a logic-decided functional block in a space area on the semiconductor chip on which the logic-undecided functional block has not been installed;
• providing a provisional wiring of power source between the logic-decided functional block and the logic-undecided functional block installed on the semiconductor chip;
• and
• determining a width of the power source wiring by analyzing a resistor network of the provisionally-provided power source wiring, and rewiring the power source wiring based on the width.

A computer-readable recording medium recorded with a program for making a computer execute a method of designing wiring for power sources in a semiconductor chip, the program comprising:

• obtaining information necessary for determining an area of a logic-undecided functional block;
• determining the area of the logic-undecided functional block based on the obtained information;
• installing a logic-decided functional block on the semiconductor chip;
• determining a shape of the logic-undecided functional block, to match a space area of the semiconductor chip on which the logic-decided functional block has been installed;
• determining a power source terminal position of the logic-undecided functional block;
• installing the logic-undecided functional block in a space area on the semiconductor chip;
• providing a provisional wiring of power source between the logic-decided functional block and the logic-undecided functional block installed on the semiconductor chip;
• and
• determining a width of the power source wiring by analyzing a resistor network of the provisionally-provided power source wiring, and rewiring the power source wiring based on the width.

A computer-readable recording medium recorded with a program for making a computer execute a method of designing wiring for power sources in a semiconductor chip, the program comprising:

• determining a shape of a logic-undecided functional block;
• determining a power source terminal position of the logic-undecided functional block;
• installing the logic-undecided functional block on a semiconductor chip;
• installing a logic-decided functional block in a space area on the semiconductor chip on which the logic-undecided functional block has not been installed;
• providing a provisional wiring of power source between the logic-decided functional block and the logic-undecided functional block installed on the semiconductor chip;
• and
• determining a width of the power source wiring by analyzing a resistor network of the provisionally-provided
• power source wiring, and rewiring the power source wiring based on the width.

A method of designing wiring for power sources in a semiconductor chip comprising:

• determining an area of the logic-undecided functional block based on an estimated area of a cell and estimated power consumption of the logic-undecided block;
• determining a shape of the logic-undecided functional block, to match a space area of the semiconductor chip on which a logic-decided functional block has been installed;
• installing the logic-undecided functional block on the semiconductor chip;
• providing a provisional wiring of a power source between the logic-decided functional block and the logic-undecided functional block;
• and
• determining a width of the power source wiring by analyzing a resistor network of the provisional wiring, and rewiring the power source wiring based on the determined width.

A computer-readable recording medium recorded with a program for making a computer execute a method of designing wiring for power sources in a semiconductor chip, the program comprising:

• determining an area of the logic-undecided functional block based on an estimated area of a cell and estimated power consumption of the logic-undecided block;
• determining a shape of the logic-undecided functional block, to match a space area of the semiconductor chip on which a logic-decided functional block has been installed;
• installing the logic-undecided functional block on the semiconductor chip;
• providing a provisional wiring of a power source between the logic-decided functional block and the logic-undecided functional block;
• and
• determining a width of the power source wiring by analyzing a resistor network of the provisional wiring, and rewiring the power source wiring based on the determined width.