Verifying on-chip decoupling capacitance using transistor and capacitor surface area information
AssigneeSun Microsystems, Inc.
InventorsTyler Thorp, Devendra Vidhani
Life of this patent
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Abstract
A technique for verifying on-chip decoupling capacitance using transistor and capacitor surface area information is provided. The technique broadly includes determining a surface area of a transistor, determining a surface area of a decoupling capacitor, comparing the surface area of the transistor to the surface area of the decoupling capacitor to obtain a surface area ratio, and verifying whether there is enough decoupling capacitance based on the surface area ratio. Further, the present invention also provides a technique for determining when and how to redesign a microprocessor in order to have sufficient decoupling capacitance.
Claims27
A method for verifying decoupling capacitance on an integrated circuit having a transistor and a decoupling capacitor, comprising:
- determining a surface area of the decoupling capacitor;
- determining a surface area of the transistor;
- defining a surface area ratio as a ratio of the surface area of the decoupling capacitor to the surface area of the transistor;
- and
- comparing the surface area ratio to a predefined range, wherein the range is between a predefined lower value and a predefined upper value.
A computer system, comprising:
- a memory;
- and
- a processor,
- wherein instructions residing in the memory are executed on the processor for determining a ratio of a surface area of a decoupling capacitor to a surface area of a transistor and verifying decoupling capacitance on an integrated circuit using the ratio.
An apparatus that verifies an amount of decoupling capacitance on a microprocessor, comprising:
- means for determining a surface area of a transistor and a surface area of a decoupling capacitor;
- means for comparing the surface area of the decoupling capacitor to the surface area of the transistor;
- and
- means for determining whether there is sufficient decoupling capacitance based on the comparison.
A method for designing a microprocessor, comprising:
- determining an amount of decoupling capacitance required by the microprocessor;
- verifying the amount of decoupling capacitance on the microprocessor, wherein verifying the amount of decoupling capacitance comprises obtaining a ratio using surface area information of a decoupling capacitor and a transistor, and comparing the ratio to a predefined lower value and an upper value;
- and
- redesigning the microprocessor based on the comparison.
Dependencies are inferred from the claim text.