US 6,604,214 B1 · One-chip microcomputer capable of internally producing ECC data

Abstract

In an one-chip microcomputer used in an automobile, error correction code data is added to corresponding user data, and then the resulting user data is stored into an EEPROM to correct an 1-bit error contained in this user data. The one-chip microcomputer is arranged by an electrically erasable memory for temporarily storing thereinto externally supplied user data and ECC (error correction code) data corresponding to the user data; a program storage memory for previously storing thereinto a program; and a CPU (central processing unit) for reading the program from the program storage memory so as to produce the ECC data based upon the externally supplied user data, and for sequentially correcting errors contained in the externally supplied user data by using the produced ECC data corresponding to the externally supplied user data.

Claims12

Dependent claims

A one-hip microcomputer comprising:

an electrically erasable memory for temporarily storing thereinto externally supplied user data;
a program storage memory for previously storing thereinto a program;
and
a CPU (Central Processing Unit) for reading said program from said program storage memory causing said CPU to produce ECC (Error Correction Code) data based upon said temporarily stored user data in accordance with said program, and for storing said temporarily stored user data and said produced ECC data in said electrically erasable memory at the same time and using the same address to enable sequential correction of errors contained in said temporarily stored user data.

1 more element

A one-chip microcomputer comprising:

an EEPROM (Electrically Erasable Programmable Read-Only Memory) for temporarily storing thereinto externally supplied user data;
a read-only memory for previously storing thereinto a program;
and
a CPU (Central Processing Unit) for reading said program from said read-only memory causing said CPU to produce ECC (Error Correction Code) data based upon said temporarily stored user data in accordance with said program, and for storing said temporarily stored user data in a user data storage region of said EEPROM and said produced ECC data in an ECC data storage region of said EEPROM at the same time and using the same address to enable sequential correction of errors contained in said temporarily stored user data.

1 more element

A one-chip microcomputer comprising:

an EEPROM (Electrically Erasable Programmable Read-Only Memory) for temporarily storing thereinto externally supplied user data;
storage means for previously storing thereinto a program;
a CPU (Central Processing Unit) for reading said program from said storage means causing said CPU to produce ECC (Error Correction Code) data from said temporarily stored user data in accordance with said program, and for storing said temporarily stored user data in a user data storage region of said EEPROM and said produced ECC data in an ECC data storage region of said EEPROM at the same time and using the same address, and further for reading said user data stored in said user data storage region and said ECC data stored in said ECC data storage region to correct an error contained in said temporarily stored user data based upon both said read user data and said read ECC data;
and
write control means for controlling storing of both said temporarily stored user data and said produced ECC data in said EEPROM.

2 more elements

Dependencies are inferred from the claim text.

One-chip microcomputer capable of internally producing ECC data

Life of this patent

One-chip microcomputer capable of internally producing ECC data

Life of this patent

Abstract

Claims12