System for controlling access to external cache memories of differing size

Abstract

A method for controlling access to at least one external cache memory in a processing system, the at least one external cache memory having a number of lines of data and a number of bytes per line of data, the method includes determining a smallest cache memory size for use in the at least one external cache memory, and configuring a tag array of the at least one external cache memory to support the smallest determined cache memory size. A system for controlling access to at least one external cache memory in a processing system, the at least one external cache memory having a number of lines of data and a number of bytes per line of data, includes a circuit for configuring each tag field of a plurality of tag fields in a tag array in the at least one external cache memory to have a number of bits sufficient to support a smallest determined cache memory, and utilizing each tag field to determine whether data being accessed resides in the at least one external cache memory.

Dependencies are inferred from the claim text.