Control apparatus for composite appliance
AssigneeCanon Kabushiki Kaisha
InventorsAtsushi Date, Katsunori Kato, Noboru Yokoyama, Tadaaki Maeda, Takafumi Fujiwara
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Abstract
The control apparatus reads the value of an external switch, and checks whether the apparatus serves as a control side or subordinate side. If the control apparatus serves as a subordinate side, it waits until the control side writes a configuration through a bus. If the control apparatus serves as a control side, it sets necessary values in itself, and writes a configuration in a device on the bus. In this way, the control apparatus can operate as both the control side and subordinate side.
Claims10
A control apparatus for a composite appliance, comprising:
- an external bus;
- a RAM to which image data may be transferred from an image input/output device and from which image data may be transferred to the image input/output device;
- a bus interface adapted to control data transfer between said external bus and said RAM;
- and
- a CPU adapted to switch a mode of said control apparatus between at least a first mode, in which said control apparatus operates as a control-side apparatus using an external device connected to said external bus, and a second mode, in which said control apparatus operates as a subordinate-side apparatus used by the external device, in accordance with a value set externally,
- wherein, in the second mode, said bus interface executes a DMA data transfer of data from the external device to said RAM in response to an access request from the external device.
A control apparatus for a composite appliance, comprising:
- an external bus;
- a RAM to which image data may be transferred from an image input/output device and from which image data may be transferred to the image input/output device;
- a bus interface adapted to control data transfer from said external bus to said RAM;
- a first bus adapted to execute a DMA data transfer between said bus interface and said RAM;
- a second bus adapted to execute a DMA data transfer between the image input/output device and said RAM;
- and
- a bus arbiter adapted to arbitrate an access request to access said RAM via said first bus and said second bus,
- wherein said bus interface controls an order of access to said RAM via said first bus and said second bus by communicating predetermined information with said bus arbiter before a DMA data transfer from said external bus to said RAM is executed.
A control method of a control apparatus that includes an external bus, a RAM to/from which image data may be transferred from/to an image input/output device, and a bus interface adapted to control data transfer between the external bus and the RAM, said method comprising steps of:
- switching a mode of the control apparatus between at least a first mode, in which the control apparatus operates as a control-side apparatus using an external device connected to the external bus, and a second mode, in which the control apparatus operates as a subordinate-side apparatus used by the external device, in accordance with a value set externally;
- and
- in the second mode, causing the bus interface to execute a DMA data transfer of data from the external device to the RAM in response to an access request from the external device.
A control method of a control apparatus that includes an external bus, a RAM to/from which image data may be transferred from/to an image input/output device, a bus interface adapted to control data transfer from the external bus to the RAM, a first bus adapted to execute a DMA data transfer between the bus interface and the RAM, a second bus adapted to execute a DMA data transfer between the image input/output device and the RAM, and a bus arbiter adapted to arbitrate an access request to access the RAM via the first bus and the second bus, said method comprising steps of:
- causing the bus interface to communicate predetermined information with the bus arbiter before a DMA data transfer from the external bus to the RAM is executed;
- and
- causing the bus interface to control an order of access to the RAM through the first bus and the second bus according to a communication result between the bus interface and the bus arbiter.
Dependencies are inferred from the claim text.