US 6,604,067 B1 · Rapid design of memory systems using dilation modeling

Abstract

A system is provided which simplifies and speeds up the process of designing a computer system by evaluating the components of the memory hierarchy for any member of a broad family of processors in an application-specific manner. The system uses traces produced by a reference processor in the design space for a particular cache design and characterizes the differences in behavior between the reference processor and an arbitrarily chosen processor. The differences are characterized as a series of dilation parameters which relate to how much the traces would expand because of the substitution of a target processor. In addition, the system characterizes the reference trace using a set of trace parameters that are part of a cache behavior model. The dilation and trace parameters are used to determine the factors for estimating the performance statistics of target processors with specific memory hierarchies.

Claims20

Dependent claims

A method for designing a computer system with a predetermined application, comprising the steps of:

selecting a reference computer system;
determining the performance characteristic of said reference computer system by running a reference computer system simulation using the predetermined application;
determining a code parameter of said reference computer system using the predetermined application;
selecting a target computer system;
determining a code parameter of said target computer system using the predetermined application;
determining a dilation parameter from the code parameter of said reference computer system and the code parameter of said target computer system;
and
using the dilation parameter to determine a comparable performance characteristic of said target computer system to the performance characteristic of said reference computer system.

5 more elements

A method for designing a computer system with a predetermined application, comprising:

selecting a reference computer system having a reference processor and a reference memory hierarchy;
determining the memory performance characteristic of said reference processor running a reference computer system simulation:
using the predetermined application;
determining an address trace parameter of said reference processor using the predetermined application;
selecting a target computer system having a target processor and a target memory hierarchy;
determining an address trace parameter of said target processor using the predetermined application;
determining a dilation parameter from the address trace parameters of said reference processor and the address trace parameter of said target processor;
and
using the dilation parameter to determine the memory performance characteristic of said target memory hierarchy to the memory performance characteristic of said reference memory hierarchy.

6 more elements

Dependencies are inferred from the claim text.

Rapid design of memory systems using dilation modeling

Life of this patent

Rapid design of memory systems using dilation modeling

Life of this patent

Abstract

Claims20