Multiple-state simulation for non-binary logic

A software-implemented simulator comprising:

• an input logic signal model reader that reads one or more input signal models for each 1-of-N input logic signal to FAST14 logic circuitry being simulated, each said input signal model further comprises one byte or less of information that identifies the following signal characteristics:
• signal is defined or undefined, signal's unique decimal signal value that further comprises one of N possible values where N is greater than 2, and signal's drive state that further comprises one of a plurality of possible drive states;
• an arithmetic/logical operator, said arithmetic/logical operator mathematically or logically manipulates the unique decimal signal value of said 1-of-N input logic signals that are defined signals to obtain the unique decimal value of each 1-of-N output logic signal of FAST14 logic being simulated;
• and
• an output logic signal model generator, said output logic signal model generator generates an output signal model for each said 1-of-N output logic signal, each said output signal model further comprises one byte or less of information that identifies the following signal characteristics of said 1-of-N output signal:
• signal is defined or undefined, signal's unique decimal signal value that further comprises one of N possible values where N is greater than 2, and signal's drive state that further comprises one of a plurality of possible drive states.

A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform a method that models logic circuitry, said method comprising:

• developing a gate syntax statement, said gate syntax statement describes a N-NARY logic circuit comprised of one or more 1-of-N input logic signals and one or more 1-of-N output logic signals;
• developing one or more input signal models for each of said 1-of-N input logic signals, each said input signal model further comprises one byte or less of information that identifies the following 'signal characteristics:
• signal is defined or undefined, signal's unique decimal signal value that further comprises one of N possible values where N is greater than 2, and signal's drive state that further comprises one of a plurality of possible drive states;
• developing one or more simulation environment files;
• and
• compiling said gate syntax statement and said simulation environment files to produce an executable software-implemented simulation model of said logic circuit, said executable software-implemented simulation model comprises a plurality of instructions that access said one or more input signal models and mathematically or logically manipulate the signal characteristics of said 1-of-N input logic signals to generate one or more output signal models that correspond to the signal characteristics of said one or more 1-of-N output signals.

A method of making a software-implemented simulator comprising:

• providing an input logic signal model reader that reads one or more input signal models for each 1-of-N input logic signal to N-NARY logic circuitry being simulated, each said input signal model further comprises one byte or less of information that identifies the following signal characteristics:
• signal is defined or undefined, signal's unique decimal signal value that further comprises one of N possible values where N is greater than 2, and signal's drive state that further comprises one of a plurality of possible drive states;
• providing an arithmetic/logical operator, said arithmetic/logical operator mathematically or logically manipulates the unique decimal signal value of said 1-of-N input logic signals that are defined signals to obtain the unique decimal value of each 1-of-N output logic signal of N-NARY logic being simulated;
• and
• providing an output logic signal model generator, said output logic signal model generator generates an output signal model for each said 1-of-N output logic signal, each said output signal model further comprises one byte or less of information that identifies the following signal characteristics of said 1-of-N output signal:
• signal is defined or undefined, signal's unique decimal signal value that further comprises one of N possible values where N is greater than 2, and signal's drive state that further comprises one of a plurality of possible drive states.