Coupling coefficient measuring method and coupling coefficient measuring apparatus for semiconductor memory

A coupling coefficient measuring method for a semiconductor memory having a first gate electrode and a second gate electrode coupled at a prescribed electrostatic coupling ratio, comprising steps of:

• increasing a voltage applied to said second gate electrode while setting a voltage applied to a source/drain region to a first voltage defining a reference value for measuring a first subthreshold current flowing through a first transistor having said first gate electrode as a gate;
• increasing said voltage applied to said second gate electrode while setting said voltage applied to said source/drain region to a second voltage higher by a prescribed value than said first voltage for measuring a second subthreshold current flowing through said first transistor;
• reading a third voltage of said second gate electrode corresponding to a first value of said first subthreshold current and a fourth voltage of said second gate electrode corresponding to a second value of said second subthreshold current equal to said first value;
• and
• calculating the ratio of the difference between said first voltage and said second voltage of said source/drain region to the difference between said third voltage and said fourth voltage of said second gate electrode thereby obtaining the coupling coefficient between said first gate electrode and said second gate electrode.

A coupling coefficient measuring method for a semiconductor memory having a first gate electrode and a second gate electrode coupled at a prescribed electrostatic coupling ratio with said first gate electrode and said second gate electrode serially arranged between a source region and a drain region, comprising steps of:

• setting the maximum voltage of said second gate electrode smaller than a voltage obtained by adding the threshold voltage of a second transistor having said second gate electrode as a gate and a drain voltage in a data area employed as a correct measured value when applying a prescribed voltage to said second gate voltage in a prescribed memory cell thereby applying a voltage to said first gate electrode by electrostatic coupling and measuring a first subthreshold current between said source region and said drain region;
• directly applying a voltage to a test gate electrode in a test memory cell for measuring a second subthreshold current between said source region and said drain region;
• and
• calculating the ratio between inclination of said first subthreshold current and inclination of said second subthreshold current thereby obtaining the coupling coefficient between said first gate electrode and said second gate electrode.

A coupling coefficient measuring apparatus for a semiconductor memory having a first gate electrode and a source region coupled at a prescribed electrostatic coupling ratio, comprising:

• means increasing a source voltage while setting a drain voltage to a first drain voltage defining a reference value for measuring a first subthreshold current flowing through a first transistor having said first gate electrode as a gate;
• means increasing said source voltage while setting said drain voltage to a second drain voltage higher by a prescribed value than said first drain voltage for measuring a second subthreshold current flowing through said first transistor;
• means reading a first source voltage corresponding to a first value of said first subthreshold current and a second source voltage corresponding to a second value of said second subthreshold current equal to said first value;
• and
• means calculating the ratio of the difference between said first drain voltage and said second drain voltage to the difference between said first source voltage and said second source voltage thereby obtaining the coupling coefficient between said first gate electrode and said source region.

A coupling coefficient measuring apparatus for a semiconductor memory having a first gate electrode and a second gate electrode coupled at a prescribed electrostatic coupling ratio, comprising:

• means increasing a voltage applied to said second gate electrode while setting a voltage applied to a source/drain region to a first voltage defining a reference value for measuring a first subthreshold current flowing through a first transistor having said first gate electrode as a gate;
• means increasing said voltage applied to said second gate electrode while setting said voltage applied to said source/drain region to a second voltage higher by a prescribed value than said first voltage for measuring a second subthreshold current flowing through said first transistor;
• means reading a third voltage of said second gate electrode corresponding to a first value of said first subthreshold current and a fourth voltage of said second gate electrode corresponding to a second value of said second subthreshold current equal to said first value;
• and
• means calculating the ratio of the difference between said first voltage and said second voltage of said source/drain region to the difference between said third voltage and said fourth voltage of said second gate electrode thereby obtaining the coupling coefficient between said first gate electrode and said second gate electrode.

A coupling coefficient measuring apparatus for a semiconductor memory having a first gate electrode and a second gate electrode coupled at a prescribed electrostatic coupling ratio with said first gate electrode and said second gate electrode serially arranged between a source region and a drain region, comprising:

• means setting the maximum voltage of said second gate electrode smaller than a voltage obtained by adding the threshold voltage of a second transistor having said second gate electrode as a gate and a drain voltage in a data area employed as a correct measured value when applying a prescribed voltage to said second gate voltage in a prescribed memory cell thereby applying a voltage to said first gate electrode by electrostatic coupling and measuring a first subthreshold current between said source region and said drain region;
• means directly applying a voltage to a test gate electrode in a test memory cell for measuring a second subthreshold current between said source region and said drain region;
• means measuring inclination of said first subthreshold current and inclination of said second subthreshold current;
• and
• means calculating the ratio between said inclination of said first subthreshold current and said inclination of said second subthreshold current thereby obtaining the coupling coefficient between said first gate electrode and said second gate electrode.