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AssigneesHitachi, Ltd., Hitachi Device Engineering Co., Ltd.
InventorsHiroko Hayata, Mitsuru Goto, Hideaki Abe, Satoshi Namiki
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A liquid crystal display device is provided with a driver circuit which can cope with an increase in the number of pixels per device. The liquid crystal display device has signal lines for driving individual pixels and a driver circuit connected to the signal lines, on a liquid-crystal-side surface of either one of substrates disposed to oppose each other with a liquid crystal interposed therebetween. The driver circuit includes a film substrate, interconnection layers formed on a surface of the film substrate, and a semiconductor chip mounted on the film substrate, and bumps are formed on the semiconductor chip inwardly of the periphery thereof. Some of the interconnection layers are connected to the bumps of the semiconductor chip, and then run under the semiconductor chip and extend to the periphery of the film substrate.
A liquid crystal display device comprising:
A liquid crystal display device comprising:
A liquid crystal display device comprising:
Dependencies are inferred from the claim text.
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Conductors connecting electrodes to cell terminals: conductors connecting driver circuitry and terminals of panels
Optical devices or arrangements for the control of light by modification of
Term ended 11 Jun 2021 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates to a liquid crystal display device and, more particularly, to an improvement in a driver circuit thereof.
An active matrix type of liquid crystal display device has transparent substrates disposed to oppose each other with a liquid crystal interposed therebetween, gate signal lines disposed on a liquid-crystal-side surface of one of the transparent substrates in such a manner as to be extended in the x direction and to be juxtaposed in the y direction, and drain signal lines disposed on the liquid-crystal-side surface in such a manner as to be extended in the y direction and juxtaposed in the x direction. Areas surrounded by the adjacent gate signal lines and the adjacent drain signal lines are formed as pixel areas. Each of the pixel areas is provided with a switching element driven by the supply of a scanning signal from the corresponding one of scanning signal lines and a pixel electrode to which a video signal is supplied from one of the video signal lines via the switching element.
A scanning signal driver circuit for supplying scanning signals to the respective gate signal lines and a video signal driver circuit for supplying video signals to the respective drain signal lines are mounted, and each of these driver circuits is made of a semiconductor device (IC) mounted on one of the transparent substrates.
Preferred embodiments of the liquid crystal display device according to the present invention will be described below in detail with reference to the following drawings, wherein:
FIG. 1 is an explanatory view illustrating one embodiment of a semiconductor chip mounted on a video signal driver circuit of a liquid crystal display device according to the present invention;
FIG. 2 is a plan view showing one embodiment of the construction of the liquid-crystal-side surface of a TFT substrate which constitutes the liquid crystal display device according to the present invention;
Preferred embodiments of the liquid crystal display device according to the present invention will be described below with reference to the accompanying drawings.
FIG. 2 is a plane view showing the liquid-crystal-side surface of a so-called TFT substrate 1 which is one of transparent substrates disposed to oppose each other with a liquid crystal interposed therebetween.
Gate signal lines 2 which are disposed to be extended in the x direction and to be juxtaposed in the y direction are formed over the liquid-crystal-side surface of the TFT substrate 1, and drain signal lines 3 which are disposed to be extended in the y direction and to be juxtaposed in the x direction are formed over the same surface in the state of being insulated from the gate signal lines 2.