Using a single control line to provide select and reset signals to image sensors in two rows of a digital imaging device

A digital imaging system comprising:

• a plurality of image sensors arranged into an array of lines including rows and columns, each image sensor including:
• a photosensor configured to collect electric charge when exposed to light;
• a select circuit coupled to the photosensor to generate an output signal indicating an amount of electric charge collected by the photosensor;
• and
• a reset circuit coupled to the photosensor to remove collected charge from the photosensor;
• and a line decoder circuit including:
• a control circuit configured to produce select signals and reset signals;
• and
• a plurality of control lines, each of which is connected to image sensors in two of the lines, and each of which is configured to deliver one of the select signals to the select circuits of image sensors in one of the two lines and to deliver one of the reset signals to the reset circuits of image sensors in the other of the two lines.

A method for use in capturing an image with a plurality of image sensors arranged into an array of lines including rows and columns, the method comprising:

• delivering a select signal to at least one image sensor in a first one of the lines and a reset signal to at least one image sensor in a second one of the lines over a single control line;
• delivering an output signal from the image sensor in the first one of the lines in response to the select signal;
• and
• clearing information from the image sensor in the second one of the lines in response to the reset signal.

An integrated circuit comprising:

• a first plurality of pixel cells disposed in a first row, said first plurality of pixel cells having a respective first plurality of reset inputs;
• a second plurality of pixel cells disposed in a second row, said second plurality of pixel cells having a respective second plurality of select inputs, said second row disposed in spaced relation to said first row;
• and
• a signal line mutually coupled to said first plurality of reset inputs and said second plurality of select inputs.

A method of operating an optical sensor having first, second and third pixel circuits comprising:

• receiving a first signal at a first reset input of said first pixel circuit and at a second select input of said second pixel circuit substantially simultaneously during a first time interval, said first signal being received over a first common signal line;
• receiving a second signal at a third reset input of said second pixel circuit and at a fourth select input of said third pixel circuit substantially simultaneously during a second time interval, said second signal being received over a second common signal line;
• resetting said first pixel circuit and selecting said second pixel circuit substantially simultaneously during said first time interval;
• and
• resetting said second pixel circuit and selecting said third pixel circuit substantially simultaneously during said second time interval.

A method of operating an imager array comprising:

• receiving a signal at a first plurality of inputs of a respective first plurality of sensor cells;
• receiving said signal at a second plurality of inputs of a respective second plurality of sensor cells, said signal received at said first and second pluralities of inputs substantially simultaneously over a common signal line;
• resetting said first plurality of sensor cells responsive to said signal;
• and
• selecting said second plurality of sensor cells responsive to said signal.

A method of forming an imager array comprising:

• forming a first row of cells including a first plurality of sensors over a semiconductor substrate;
• forming a second row of cells including a second plurality of sensors over said semiconductor substrate, said first and second rows of cells disposed in spaced relation to one another;
• forming a signal line over said semiconductor substrate and disposed in spaced relation to said first and second rows of cells;
• coupling said signal line to a first plurality of reset inputs and a second plurality of select inputs of said first and second rows of cells respectively;
• forming a diver circuit over said semiconductor substrate;
• and
• coupling said signal line to an output of said driver circuit.