Subsampling digitizer-based frequency synthesizer
AssigneeIntersil Americas Inc.
InventorGeorge E. Von Dolteren, Jr.
Life of this patent
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Abstract
A reduced phase noise multiplication, digitally controlled frequency synthesizer employs a subsampling digitizer to downconvert (perform ‘constructive aliasing’ of) the synthesizer's output frequency to baseband for precision tuning of the synthesizer's output frequency in a digitally controlled phase locked loop. The use of a digitally controlled phase locked loop allows the stepsize of the synthesizer output frequency to be controlled in very small (e.g., sub-Hertz) increments. Since the phase locked loop uses all digital components for tuning control, no additional frequency division by the loop is required. This means that only the value of the subharmonic ratio ‘n’ of the subsampling clock to the analog-to-digital converter will determine multiplicative phase noise error.
Claims5
An apparatus for generating an output frequency signal comprising:
- an input port to which a reference frequency signal is applied;
- an output port from which said output frequency signal having a tunable multiple of said input frequency is derived;
- a subsampling digitizer coupled to said output port and being driven by a subsampling clock signal at a subharmonic fraction of an output frequency of the output frequency signal to produce a digitized frequency signal that has a subharmonic relationship with said output frequency signal;
- and
- a digital phase locked loop that is operative to generate said output frequency signal in accordance with a comparison of said digitized frequency signal produced by said subsampling digitizer and a tuning increment of said reference frequency signal.
A method for generating an output frequency signal comprising the steps of:
- (a) generating a reference frequency signal;
- and
- (b) generating said output frequency signal as a function of said reference frequency signal by
- (b1) digitizing said output frequency signal by way of a subsampling digitizer driven by a subsampling clock signal at a subharmonic fraction of an output frequency of the output frequency signal to produce a digitized frequency signal that has a subharmonic relationship with said output frequency signal, and
- (b2) coupling said reference frequency signal and said digitized frequency signal to a digital phase locked loop that is operative to generate said output frequency signal in accordance with a comparison of said digitized frequency signal produced by said subsampling digitizer and a tuning increment of said reference frequency signal.
A frequency synthesizer comprising:
- an input port to which a precision reference frequency signal fR used to establish the operation frequency of the synthesizer is applied;
- a quadrature based digital phase locked loop that includes a numerically driven digital baseband oscillator, which is operative to couple respective in-phase (I) and quadrature-phase (Q) reference frequency step-controlling components fRI and fRQ to respective I and Q channel digital mixers in accordance with said precision reference frequency signal fR, said respective I and Q channel digital mixers being coupled to receive the output of an analog-to-digital converter to which an input frequency fO corresponding to the output frequency fO of a controlled output oscillator is coupled, and being coupled to a phase error generator, which outputs a digital phase error representative signal θe to said output frequency fO of said controlled oscillator, said controlled oscillator having an output port from which said output frequency signal fO that is a tunable multiple of said reference frequency fR is derived;
- and
- a subsampling clock coupled to clock said analog-to-digital converter at a subsampling clock frequency fs that is subharmonically related to its input frequency fO, so that said analog-to-digital converter effectively performs ‘constructive aliasing’ of said input frequency fO, to produce a digitized frequency signal that is subharmonically related to said input frequency fO.
Dependencies are inferred from the claim text.