Low-voltage non-degenerative transmitter circuit
AssigneeXilinx, Inc.
InventorsHenry A. Om'Mani, Thomas J. Davies, Jr.
Life of this patent
Estimating the term…
Abstract
A CPLD employs a low-voltage, non-degenerative transmitter circuit to eliminate the need for a dedicated control pin to provide the relatively high voltage levels required to verify the program states of programmable memory cells. Eliminating the need for a dedicated control pin frees up valuable chip real estate for the inclusion of an additional general-purpose input/output pin.
Claims15
A logic device adapted to function as a logic circuit in an operational mode and to be tested in a test mode, the logic device comprising:
- a. a power-supply line adapted to distribute an external power-supply voltage throughout the logic device;
- b. a device pin adapted to receive a variable input signal;
- c. a device input circuit adapted to receive logic signals in the operational mode, the input circuit having:
- i. a power-supply terminal connected to the power-supply line;
- and
- ii. a device input terminal connected to the device pin;
- and
- d. a transmitter circuit including:
- i. a transistor having:
- 1) a first current-handling terminal connected to the device input pin;
- 2) a second current-handing terminal;
- and
- 3) a control terminal;
- and
- ii. an amplifier having:
- 1) an amplifier input terminal connected to the device input pin;
- and
- 2) an amplifier output terminal connected to the transistor control terminal;
- 3) wherein the amplifier is adapted to produce, on the amplifier output terminal, an amplifier output voltage greater than the power-supply voltage when the logic device is in the test mode.
A programmable logic device capable of operating in a logic mode and a test mode, the logic device comprising:
- a. an input/output pin adapted to receive a test voltage in the test mode;
- b. a programmable input/output circuit connected to the input/output pin, the programmable input/output circuit active in the logic mode to convey signals via the input/output pin;
- c. a collection of programmable memory cells, a portion of which are adapted to define an input/output function of the programmable input/output circuit;
- and
- d. a transmitter circuit having a transmitter input terminal connected to the input/output pin, a transmitter output terminal selectively coupled to the collection of programmable memory cells, and a high-voltage terminal adapted to produce a high voltage greater than the test voltage.
Dependencies are inferred from the claim text.