Method and apparatus for testing integrated circuit

An apparatus for testing a plurality of integrated circuits for executing a plurality of tests by executing a plurality of programs corresponding thereto, the apparatus comprising:

• an automatic sorter for storing a final test result;
• a control section including:
• storage means for storing the plurality of testing programs;
• and
• transfer control means for transferring the plurality of testing programs on the basis of a control command;
• and
• an IC testing section coupled to an output of the control section and to an input of the sorter, the IC testing section including:
• a first storage means for storing the plurality of testing programs transferred from the transfer control means;
• a second storage means for temporarily storing test results;
• and
• a processing means for executing the plurality of testing programs, temporarily storing the test results in the second storage means whenever the execution of each testing programs is completed, synthesizing all of the test results after the execution of all of the testing programs is completed to set a final test result for each of the plurality of integrated circuits, and sending the final result for each of the plurality of integrated circuits to the automatic sorter.