Flat-panel display
AssigneeLG Electronics Inc.
InventorJerry D. Schermerhorn
Life of this patent
Estimating the term…
Abstract
Isolated conductive Charge Storage Pads (CSP's) are incorporated in and strategically positioned to increase the efficiency of a flat panel gas discharge plasma display device. The display comprises a hermetically sealed gas filled enclosure which includes a first glass substrate having a plurality of electrodes covered by a thin dielectric film upon which charge storage pads are placed, and a second glass substrate spaced from the first glass substrate. The second substrate includes a plurality of phosphor coated micro-voids filled with an ionizable gas, each associated with an address electrode.
Claims48
A matrix addressable plasma flat-panel display comprising:
- a first transparent substrate;
- a plurality of linear display electrodes deposited in parallel rows across a surface of said first substrate;
- a dielectric layer of insulating film deposited upon said surface of said first substrate, said insulating film covering said display electrodes;
- at least one electrically conductive surface pad located upon the surface of said dielectric layer of insulating film in association with a corresponding display electrode, said conductive surface pad covering only a portion of said corresponding display electrode and cooperating with said display electrode to form a capacitor, said capacitor operative to store electrical charge whereby the efficiency of the plasma flat-panel display is improved;
- an electron emissive surface coating covering at least a portion of said insulating film and said display electrodes;
- a second substrate which is hermetically sealed to said first substrate, said second substrate having a plurality of micro-voids formed in a surface thereof which is adjacent to said first substrate, said micro-voids cooperating with said first substrate to define a plurality of sub-pixels which form rows parallel to said display electrodes and columns which are perpendicular to said display electrodes;
- a gas filling said micro-voids;
- a plurality of address electrodes incorporated within said second substrate, each of said address electrodes corresponding to one column of said sub-pixels;
- and
- a phosphor material deposited within each micro-void and associated with said address electrodes.
A matrix addressable plasma flat-panel display comprising:
- a first transparent substrate;
- a first plurality of linear display electrodes deposited in parallel rows across a surface of said first substrate;
- a layer of insulating film deposited upon said surface of said first substrate, said insulating film covering said first plurality of display electrodes;
- a second plurality of linear display electrodes deposited in parallel rows across said first layer of insulating film opposite from and in cooperation with said first plurality of display electrodes;
- a second layer of insulating film deposited upon said surface of said first layer of insulating film and covering said second plurality of display electrodes;
- at least one electrically conductive surface pad located upon a surface of said second layer of insulating film opposite from and in association with a corresponding second display electrode, said conductive surface pad cooperating with said second display electrode to form a capacitor, said capacitor operative to store electrical charge whereby the efficiency of the plasma flat-panel display is improved;
- an electron emissive surface coating covering at least a portion of said insulating film and said second plurality of display electrodes;
- a second substrate which is hermetically sealed to said first substrate, said second substrate having a plurality of micro-voids formed in a surface thereof which is adjacent to said first substrate, said micro-voids cooperating with said first substrate to define a plurality of sub-pixels which form rows parallel to said display electrodes and columns which are perpendicular to said display electrodes;
- a gas filling said micro-voids;
- a plurality of address electrodes incorporated within said second substrate, each of said address electrodes corresponding to one column of said sub-pixels;
- and
- a phosphor material deposited within each micro-void and associated with said address electrodes.
A matrix addressable plasma flat-panel display comprising:
- a first transparent substrate;
- a first plurality of linear display electrodes deposited in parallel rows across a surface of said first substrate;
- a first dielectric layer of insulating film deposited upon said surface of said first substrate, said insulating film covering said first plurality of display electrodes;
- a second plurality of linear display electrodes deposited in parallel rows across said first layer of insulating film opposite from and corresponding to said first plurality of display electrodes, each of said second linear display electrodes covering only a portion of one of said corresponding first display electrodes;
- a second dielectric layer of insulating film deposited upon said first dielectric layer of insulating film and covering said second plurality of display electrodes;
- at least one electrically conductive surface pad located upon a surface of said second dielectric layer of insulating film opposite from and corresponding to a second display electrode, said conductive surface pad also covering only a portion of said first display electrode corresponding to said second display electrode, said conductive surface pad cooperating with both of said first and second corresponding display electrodes to form a capacitor, said capacitor operative to store electrical charge whereby the efficiency of the plasma flat-panel display is improved;
- an electron emissive surface coating covering at least a portion of said second insulating film and said second plurality of display electrodes;
- a second substrate which is hermetically sealed to said first substrate, said second substrate having a plurality of micro-voids formed in a surface thereof which is adjacent to said first substrate, said micro-voids cooperating with said first substrate to define a plurality of sub-pixels which form rows parallel to said first display electrodes and columns which are perpendicular to said first display electrodes;
- a gas filling said micro-voids;
- a plurality of address electrodes incorporated within said second substrate, each of said address electrodes corresponding to one column of said sub-pixels;
- and
- a phosphor material deposited within each micro-void and associated with said address electrodes.
A matrix addressable plasma flat-panel display comprising:
- a first transparent substrate;
- a plurality of linear display electrodes deposited in parallel rows across said first substrate;
- a dielectric layer of insulating film deposited upon said surface of said first substrate, said insulating film covering said display electrodes;
- a plurality of spaced apart electrically conductive surface pads located upon the surface of said dielectric layer of insulating film in association with and parallel to a corresponding display electrode, each of said conductive surface pads covering only a portion of said corresponding display electrode and cooperating with said display electrode to form a plurality of capacitors, each of said capacitors operative to store electrical charge whereby the efficiency of the plasma flat-panel display is improved;
- an electron emissive surface coating covering at least a portion of said insulating film and said display electrodes;
- a second substrate which is hermetically sealed to said first substrate, said second substrate having a plurality of micro-voids formed in a surface thereof which is adjacent to said first substrate, said micro-voids cooperating with said first substrate to define a plurality of sub-pixels which form rows parallel to said display electrodes and columns which are perpendicular to said display electrodes;
- a gas filling said micro-voids;
- a plurality of address electrodes incorporated within said second substrate, each of said address electrodes corresponding to one column of said sub-pixels;
- and
- a phosphor material deposited within each micro-void and associated with said address electrodes.
A matrix addressable plasma flat-panel display comprising:
- a first transparent substrate;
- a first plurality of linear display electrodes deposited in parallel rows across a surface of said first substrate;
- a first dielectric layer of insulating film deposited upon said surface of said first substrate, said insulating film covering said first plurality of display electrodes;
- a second plurality of linear display electrodes deposited in parallel rows across said first layer of insulating film opposite from and corresponding to said first plurality of display electrodes, each of said second linear display electrodes covering only a portion of one of said corresponding first display electrodes;
- a second dielectric layer of insulating film deposited upon said first dielectric layer of insulating film and covering said second pluraity of display eletrodes;
- a plurality of spaced apart electrically conductive surface pads located upon a surface of said dielectric layer of insulating film, said conductive surface pads being opposite from and parallel to a corresponding second display eletrode, each of said conductive surface pads covering only a portion of said first display eletrode corresponding to said second display eletrode, said conductive surface pads cooperating with both of said first and second corresponding display eletrodes to form a plurality of capacitors, each of said capacitors operative to store electrical charge whereby the efficiency of the plasma flat-panal display is improved;
- an electron emissive surface coating covering at least a portion of said second insulating film and said second plurality of display electrodes;
- a second substrate which is hermetically sealed to said first substrate, said second substrate having a plurality of micro-voids formed in a surface thereof which is adjacent to said first substrate, said micro-voids cooperating with said first substrate to define a plurality of sub-pixels which form rows parallel to said display electrodes and columns which are perpendicular to said display electrodes;
- a gas filling said micro-voids;
- plurality of address electrodes incorporated within said second substrate, each of said address eletrodes corresponding to one cloumn of said sub-pixels;
- and
- a phosphor material deposited within each micro-void and associated with said address electrodes.
Dependencies are inferred from the claim text.