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US 6,603,190 B2Granted
Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKatsuya Kosaki, Hirofumi Nakano, Tetsuo Kunii
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Abstract
A semiconductor device having a plated heat sink (PHS) layer on the back surface, preventing a short circuit between a bonding wire, and a first metal layer. A method of making a semiconductor device including forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, and forming the first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.
Claims5
A semiconductor device comprising:
- a semiconductor substrate having first and second main surfaces, having a semiconductor element in the first main surface, and having a peripheral surface contacting the first and second main surfaces;
- a heat radiation layer on the second main surface of the semiconductor substrate;
- and
- a flange including a plurality of metal layers disposed on the peripheral surface of the substrate, the metal layers comprising:
- a first metal layer having a surface layer containing palladium on a side toward the first main surface;
- a second metal layer of a nickel-based alloy contacting the surface layer containing palladium of the first metal layer, the second metal layer having a topmost portion located below and spaced from the first main surface;
- and
- a third metal layer disposed under the first metal layer.
5 more elements
Dependencies are inferred from the claim text.