US 6,603,180 B1 · Semiconductor device having large-area silicide layer and process of fabrication thereof

Abstract

A semiconductor device having a large-area silicide layer and fabrication method is provided. A semiconductor device, consistent with one embodiment of the invention, includes a silicon substrate, a gate insulating layer disposed over the silicon substrate, a gate electrode disposed over the gate insulating layer, and at least one active region disposed adjacent the gate electrode. Formed over the active region and in contact with the insulating layer is a silicide layer. The active region may, for example, be a source/drain region. The silicide layer generally has a surface area which is larger than that of conventional silicide layers. This, for example, reduces the resistance of the active regions of the semiconductor device and enhances device performance.

Claims19

Dependent claims

A process of fabricating a semiconductor device, comprising:

forming a gate insulating layer of a first thickness over a substrate;
forming a gate electrode over the gate insulating layer;
implanting a dopant and forming lightly doped regions in the substrate;
forming a metal layer over the substrate;
and
forming silicide on and extending over the gate electrode and over an active region of the substrate adjacent the gate electrode and extending from the gate electrode to be in contact with the gate insulating layer, the silicide having a thickness less than the first thickness.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor device having large-area silicide layer and process of fabrication thereof

Life of this patent

Semiconductor device having large-area silicide layer and process of fabrication thereof

Life of this patent

Abstract

Claims19