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US 6,603,179 B2Granted
Semiconductor apparatus including CMOS circuits and method for fabricating the same
AssigneeNEC Electronics Corporation
InventorsKoichi Ando, Mariko Makabe, Shin Koyama
Life of this patent
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Abstract
The abstract isn’t available for this document.
Claims17
A semiconductor apparatus comprising:
- a P-channel MISFET (Metal Insulator Semiconductor Field Effect Transistor) including a first gate insulator which contains first positive charges therein;
- and
- an N-channel MISFET including a second gate insulator which contains second positive charges therein, wherein a first charge density of said first positive charge is larger than a second charge density of said second positive charge, a circuit includes said P-channel MISFET and said N-channel MISFET, an increase in an operating current of said P-channel MISFET is greater than a decrease in another operating current of said N-channel MISFET, threshold voltages of said N-channel MISFET and said P-channel MISFET being determined by varying impurity concentrations therein, said first positive charge and said second positive charge being fixed charges.
A semiconductor apparatus comprising:
- a P-channel MISFET (Metal Insulator Semiconductor Field Effect Transistor) including a first gate insulator containing charges selected from the group consisting of:
- substantially no charges therein, and positive charges therein;
- and
- an N-channel MISFET including a second gate insulator,
- wherein threshold voltages of said P-channel MISFET and said N-channel MISFET are determined by changing the concentration of impurities therein in accordance with the charges of each of said P-channel MISFET and said N-channel MISFET.
2 more elements
Dependencies are inferred from the claim text.