Power semiconductor device for power integrated circuit device

Abstract

Provided is a DAD that improves resistance to latch-up and stabilizes breakdown voltage characteristic. Specifically, a first gate electrode (10) and a second drain electrode (13) are linear electrodes having a length not exceeding the length of a source electrode (9). An isolation region (20) is disposed on both end portions of these electrodes. The region surrounded by two isolation regions (20) and the source electrode (9) becomes a P channel MOS region (PR) where a P channel MOS transistor is to be formed. The isolation region (20) has a multi-trench structure that a plurality of trenches (21) are provided in a P type impurity region disposed so as to be rectangle as viewed in plan configuration. Each trench (21) is filled with a conductor such as polysilicon, and the filled conductor is disposed so that it makes no electrical contact with any specific part.

Dependencies are inferred from the claim text.