Use of linear injectors to deposit uniform selective ozone TEOS oxide film by pulsing reactants on and off
AssigneeMicron Technology, Inc.
InventorsWilliam Budge, Gurtej S. Sandhu, Christopher W. Hill
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AssigneeMicron Technology, Inc.
InventorsWilliam Budge, Gurtej S. Sandhu, Christopher W. Hill
Estimating the term…
A process for enhanced selective deposition of a silicon oxide onto a substrate by pulsing delivery of the reactants through a linear injector is disclosed. The silicon oxide layer is formed by the ozone decomposition of TEOS at relatively low temperatures and relatively high pressures. The ozone delivery is pulsed on and off. Optionally, the delivery of the ozone and the delivery of the TEOS are pulsed on and off alternately.
A method of forming a semiconductor device, the method comprising the steps of:
A method of forming a semiconductor device, the method comprising the steps of:
A method of forming a semiconductor device, the method comprising the steps of:
A method of forming a semiconductor device, the method comprising the steps of:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
Using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition: deposition by cyclic CVD, e.g. ALD, ALE or…
Manufacturing their gate conductors: the gate conductors being silicided
Manufacturing their gate conductors: the gate conductors having different materials or different implants
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their gate sidewall spacers
Term ended 31 Aug 2020 (estimated)
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This invention relates to the fabrication of semiconductor devices. More particularly, this invention relates to selective deposition of silicon oxide onto silicon substrates.
Optimization of semiconductor fabrication sometimes requires a thicker nonconducting film on some components than on other components. Such films of different thicknesses can be made by traditional mask and etch techniques or by selective deposition of the reaction product of TEOS and ozone.
Traditional mask and etch methods of forming oxide layers and spacers of different thicknesses requires the application of a first mask over select parts of the semiconductor device and then depositing a layer of silicon oxide over the unmasked parts of the semiconductor device. The first mask is then removed and a second mask is applied over the parts that have been coated with the first silicon oxide layer leaving other parts unmasked. Subsequently, a second silicon oxide layer is deposited on the unmasked parts. Finally, an etch is used to remove silicon oxide from select surfaces, leaving behind an oxide layer or spacers where desired. This process adds a number of steps to the manufacturing procedures thereby increasing the complexity of the fabrication. As such, semiconductors are typically manufactured oxide with oxide layers or spacers of an intermediate thickness that will work acceptably, although not optimally, for substrates of different conductivity or composition.
Preferred embodiments of the invention are described below with reference to the following accompanying drawings, which are for illustrative purposes only. Throughout the following views, reference numerals will be used in the drawings, and the same reference numerals will be used throughout the several views and in the description to indicate same or like parts.
FIG. 1 is a cross-sectional view of a silicon-comprising substrate having an N-type silicon-comprising protrusion and a P-type silicon-comprising protrusion.
FIG. 2 shows the substrate of FIG. 2 following selective depositing of silicon oxide.
In the following detailed description, references are made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention.
The terms “wafer” or “substrate” used in the following description include any semiconductor-based structure having an exposed polysilicon or other silicon-comprising surface in which to form the silicon oxide deposition layer of this invention. Wafer and substrate are to be understood as including silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) technology, doped and undoped semiconductors, epitaxial layers of silicon supported by a base semiconductor foundation, and other semiconductor structures. Furthermore, when references made to a wafer or substrate in the following description, previous process steps may have been used to form regions or junctions in the base semiconductor structure or foundation.
The following discussion based on FIGS. 1-3 illustrates a typical selective deposition process which can be enhanced by application of the current inventive process. The exemplary selective deposition process is shown as occurring on a substrate of differently doped areas of silicon but the process would be the same if the substrate comprised silicon and silicon nitride.