Method for fabricating semiconductor devices

A method for fabricating semiconductor devices comprising the steps of:

• forming a plating seed layer on a base member;
• forming by a plating process a plated film on said plating seed layer in an area excluding the outer peripheral portion of said base member wherein the plating process uses an electrical contact that is made with the plating seed layer located in the outer peripheral portion;
• removing by etching said plating seed layer on the outer peripheral portion of said base member;
• and
• polishing said plated film together with said plating seed layer by a electrolytic polishing process wherein the electrolytic polishing process utilizes an electrical contact that is made with a barrier layer located in the outer peripheral portion and the barrier layer is also located between the plating seed layer and the base member.

A method for fabricating semiconductor devices comprising the steps for:

• forming a plating seed layer on a base member;
• forming a plated film on said plating seed layer in a central surface area of said base member;
• polishing said plated film together with said plating seed layer with an electrolytic polishing process while using an outer peripheral portion of the plating seed layer as an electrical contact for the electrolytic polishing process;
• and
• thereafter selectively removing said plating seed layer remaining in an outer area of said base member.

A method for fabricating semiconductor devices comprising the steps for:

• forming a plating seed layer on a base member;
• forming a plated film on said plating seed layer in a central surface area of said base member;
• removing said plating seed layer in an outer area of said base member;
• and
• polishing said plated film together with said plating seed layer with an electrolytic polishing process, wherein the electrolytic polishing process utilizes an electrical contact that is made with a barrier layer located in the outer peripheral portion and the barrier layer is also located between the plating seed layer and the base member.