Method for manufacturing a semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
Estimating the term…
A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.
A method of manufacturing a semiconductor device, said method comprising the steps of:
A method of manufacturing a semiconductor device, said method comprising the steps of:
A method of manufacturing a semiconductor device, said method comprising the steps of:
A method of manufacturing a semiconductor device, said method comprising the steps of:
A method of manufacturing a semiconductor device, said method comprising the steps of:
A method of manufacturing a semiconductor device, said method comprising the steps of:
Dependencies are inferred from the claim text.
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The present invention relates to a method for manufacturing a semiconductor device which includes a non-single crystalline semiconductor layer formed on a substrate, for example, an insulating substrate such as glass. In particular, the semiconductor device is of an insulated gate type such as a thin film transistor (TFT) or thin film diode (TFD). The present invention is further related to a manufacture of a thin film integrated circuit utilizing the TFT or TFD, specifically a thin film integrated circuit for an active matrix liquid crystal display device.
In recent years, active matrix liquid crystal device and an image sensor have been developed which utilize a semiconductor device having TFTs formed on an insulating substrate such as glass for driving pixels or as a peripheral circuit.
Silicon in the form of a thin film is most generally used for forming TFTs of these semiconductor devices. Generally, thin film silicon semiconductors are classified to (a) amorphous silicon and (b) crystalline silicon. While amorphous silicon is easy to form at a relatively low temperature, electrical characteristics of the amorphous silicon is inferior to crystalline silicon.
The foregoing feature and other features of the invention will be described in detail with reference to the attached drawings in which:
FIGS. 1A-1E show cross sectional diagrams showing a manufacturing process in accordance with a first example of the invention;
FIGS. 2A-2E show cross sectional diagrams showing a comparative example of the present invention;
In this invention, inorganic materials such as silicon oxide or silicon nitride or a mixture thereof are usable as a blocking layer which is to be formed on a semiconductor layer prior to a provision of a photoresist thereon. In particular, the blocking layer comprises an oxide which is formed by oxidizing a surface of the semiconductor layer. Namely, the oxide is formed by subjecting the semiconductor to a heat annealing at a such a temperature that the substrate is not damaged or to a photoannealing, in an oxidizing atmosphere such as oxygen, oxygen nitride and ozone. Also, in this invention, the photoannealing means a process in which a laser light or a light having an enough intensity as equivalent to laser light is used. Usable as light sources are industrially available lasers such as excimer laser, YAG laser, CO2 laser or ruby laser, xenon lamp, krypton arc lamp, halogen lamp and the like.
When employing the heat annealing in this invention, it is desirable to use a temperature which does not cause a substrate bend or contract, for example, it is preferable to use a temperature ranging 400° C. to 700° C., more preferably 500° C. to 600° C. The thickness of the oxide can be controlled by changing the temperature and the length of the heat annealing. In this invention, it is desirable to make the oxide layer pinhole free and as thin as possible, for example, 20 Å to 100 Å.
Also, it is possible to use a higher temperature if there is no patterning provided on the substrate. Furthermore, if the substrate is provided with a pattern, although it is desirable to use a temperature which is lower than a strain point of the substrate, a higher temperature may be used if the substrate is thermally treated in advance in order to release internal stress of the substrate and thus to minimize a contraction of the substrate in the subsequent heating step.
Characterised by treatments done after the formation of the materials: crystallisation or recrystallisation of non-monocrystalline semiconductor…
Materials: being non-crystalline insulating materials, e.g. glass or polymers
Materials thereof: being insulating materials
Being Group IVA materials: silicon, silicon germanium or germanium
Term ended 23 Jul 2014 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.