# US 6,594,792 B1 · Modular turbo decoder for expanded code word length

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- Number: US 6,594,792 B1
- Document ID: US6594792B1
- Status: Granted
- Kind: B1
- Application number: 09/561,333
- Filed: 2000-04-28
- Granted: 2003-07-15
- Earliest claimed: 1999-04-30
- Assignees: General Electric Company
- Inventors: Stephen Michael Hladik; Abdallah Mahmoud Itani; Nick Andrew Van Stralen; Robert Gideon Wodnicki; John Anderson Fergus Ross
- Web page: https://patentgrep.com/patent/US6594792B1

## CPC

- H03M 13/3905: {Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding}
- H03M 13/2957: {Turbo codes and decoding}
- H03M 13/3933: {Decoding in probability domain}
- H03M 13/3972: {using sliding window techniques or parallel windows}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data-rate capability of the turbo decoder system. Input data samples are provided to an interleaver/de-interleaver module wherein they are divided into segments of predetermined size, each segment being provided to a respective turbo decoder module. The outputs of each turbo decoder module are a posteriori probabilities which are re-ordered in the interleaver/de-interleaver module, segmented, and provided back to the turbo decoders as a priori information-bit probabilities. For the case of a turbo code comprising two component codes, the a posteriori information-bit probabilities are re-ordered according to the interleaver definition at the end of odd-numbered half iterations, while at the end of even-numbered half iterations, they are re-ordered according to the de-interleaver definition. Decoding continues until the desired number of iterations have been performed. Data decisions are made on the final a posteriori bit probability estimates.

## Claims

### Claim 1

A turbo decoder system, comprising:
a plurality M of turbo decoder modules, each for decoding a maximum code-word size corresponding to N information bits according to a turbo decoding algorithm;
interleaver/de-interleaver circuitry for receiving input data samples corresponding to (M·N) information bits and for receiving a priori bit probabilities, the interleaver/de-interleaver circuitry having predetermined interleaver and de-interleaver definitions, the interleaver/de-interleaver circuitry segmenting the input data samples into M segments, each segment being provided to a respective turbo decoder module which provides as output a posteriori bit probabilities based on the corresponding segment of input data samples, the interleaver/de-interleaver circuitry re-ordering the a posteriori bit probabilities according to the interleaver definition upon the end of odd-numbered half iterations and according to the de-interleaver definition upon the end of even-numbered half iterations.

### Claim 2 (depends on 1)

The turbo decoder system of claim 1 wherein each respective turbo decoder module comprises a common input bus for the input data samples and the a priori bit probability values.

### Claim 3 (depends on 1)

The turbo decoder system of claim 1 wherein the turbo decoding algorithm comprises a MAP decoding algorithm.

### Claim 4

A turbo decoder system, comprising:
a plurality M of turbo decoder modules, each for decoding a maximum code-word size corresponding N information bits according to a turbo decoding algorithm, each turbo decoder module comprising a double buffer structure for storing non-interleaved and interleaved data samples at the start of each input data sample corresponding to a turbo code word;
interleaver/de-interleaver circuitry for receiving input data samples corresponding to (M·N) information bits and for receiving a priori bit probabilities, the interleaver/de-interleaver circuitry having predetermined interleaver and de-interleaver definitions, the interleaver/de-interleaver circuitry segmenting the input data samples into M segments, each segment being provided to a respective turbo decoder module which provides as output a posteriori bit probabilities based on the corresponding segment of input data samples, the interleaver/de-interleaver circuitry re-ordering the a posteriori bit probabilities according to the interleaver definition upon the end of odd-numbered half iterations and according to the de-interleaver definition upon the end of even-numbered half iterations.

### Claim 5 (depends on 4)

The turbo decoder system of claim 4 wherein each respective turbo decoder module comprises a common input bus for the input data samples and the a priori bit probability values.

### Claim 6 (depends on 4)

The turbo decoder system of claim 4 wherein the turbo decoding algorithm comprises a MAP decoding algorithm.