Programmable ASIC
AssigneeLSI Logic Corporation
InventorDaniel Watkins
Life of this patent
Estimating the term…
Abstract
A method for programming a circuit comprising the steps of (A) simulating one or more states, (B) building program information in response to said simulation and (C) extracting from said simulation one or more unique states having current state to next state sequences. The present invention includes a method and/or architecture that may implement (i) content addressable memory system (CAMS), (ii) memory, (iii) register files and (iv) other logic to implement programmability on application specific integrated circuits (ASICs). The architecture is performance and cost competitive with field programmable gate arrays (FPGAs) and programmable logic devices (PLDs).
Claims33
A method for programming an application specific integrated circuit (ASIC) comprising the steps of:
- (A) simulating one or more states;
- (B) building program information in response to said simulation;
- (C) extracting from said simulation one or more unique states having current state to next state sequences;
- and
- (D) introducing copies of states to multiple process blocks or states, wherein said multiple states consolidate one or more other states in a process block.
An apparatus comprising:
- a first circuit configured to generate (i) one or more first control signals and (ii) one or more second control signals in response to (i) an input signal and (ii) a current internal state, wherein said input signal is masked to match an entry in a memory configured to provide a next set of control signals;
- a second circuit configured to generate a third control signal and a fourth control signal in response to said one or more second control signals;
- and
- a third circuit configured to generate an output signal in response to (i) said one or more first control signals and (ii) said third and fourth control signals.
A computer readable medium configured to store instructions to execute the following steps:
- (A) simulating one or more states;
- (B) building program information in response to said simulation;
- (C) extracting from said simulation one or more unique states having current state to next state sequences;
- and
- (D) fragmenting one or more process blocks to one or more pages within a compiler in response to one or more user inputs.
A method for programming an application specific integrated circuit (ASIC) comprising the steps of:
- (A) simulating one or more states;
- (B) building program information in response to said simulation;
- (C) extracting from said simulation one or more unique states having current state to next state sequences;
- (D) introducing copies of states to multiple process blocks or states;
- and
- (E) if the process blocks or states are beyond what is available in a CAM, where there is no L2 cache, executing a line buffer miss capability routine.
Dependencies are inferred from the claim text.