Circuit and method for varying a pulse width of an internal control signal during a test mode
AssigneeMicron Technology, Inc.
InventorsTodd A. Merritt, George B. Raad, Stephen L. Casper
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Abstract
The invention is a dynamic random access memory (DRAM) device having an electronic test key fabricated on board and is a method for testing the DRAM. The electronic test key generates a signal which effects a variation in a pulse width of an internal control signal to stress the DRAM during a test mode.
Claims19
An electrical device having a circuit function during a normal operation mode, said electrical device fabricated on a supporting substrate, said electrical device comprising:
- a) a first internal circuit for generating a first internal RAS signal having a pulse width in response to an external RAS signal, said electrical device performing the circuit function in response to said first internal RAS signal;
- and
- b) a second internal circuit for generating an internal test signal in response to an external test signal, said second internal circuit in electrical communication with said first internal circuit, wherein a value of said pulse width of said first internal RAS signal varies during a test mode from a value of said pulse width during the normal operation mode in response to said internal test signal.
A monolithic memory device for storing electrical data, comprising:
- a) a means for generating an internal RAS signal having a pulse, said memory device performing a normal operation circuit function in response to said RAS signal in a normal operation mode;
- and
- b) a means for varying a value of a pulse width of said pulse during a testing of a performance of said normal operation circuit function from a value of said pulse width during said normal operation mode.
A memory device for storing data, the memory device being responsive to an external RAS signal and an external test signal, comprising:
- a) an internal lockout circuit for generating an internal RAS signal having a pulse in response to said external RAS signal, said pulse of said internal RAS signal meeting a minimum pulse width circuit requirement during normal operation of the memory device regardless of a pulse width of a corresponding pulse of said external RAS signal;
- and
- b) an internal test key circuit in electrical communication with said internal lockout circuit, said internal test key circuit responding to said external test signal to provide a test key signal, said internal lockout circuit responding to said test key signal during a test mode to decrease said pulse width of said pulse of said internal RAS signal in order to stress the memory device during a test mode.
A monolithic memory device for storing data, comprising:
- a) a lockout means for locking out effects of an external RAS signal thereby increasing a value of a pulse width of a pulse of an internal RAS signal from a value of a pulse width of a corresponding pulse of said external RAS signal during a normal operation of the monolithic memory device;
- and
- b) an internal testing means for decreasing the value of the pulse width of the internal RAS signal during a test mode from the value of the pulse width of the pulse of the internal RAS signal during the normal operation.
A method of operating an encapsulated memory device, comprising the following steps:
- a) generating an internal RAS signal in the encapsulated memory device;
- b) performing a memory circuit function during a normal operation of the memory device in response to said internal RAS signal;
- c) generating a test signal in the encapsulated memory device;
- d) varying a pulse width of a pulse of said internal RAS signal in response to said test signal in order to stress the memory device;
- and
- e) testing said memory circuit function during said step of varying.
A method for operating an encapsulated electrical device, comprising the following steps:
- a) internally generating in the electrical device an internal RAS signal having a pulse having a pulse width during a normal operation mode;
- and
- b) varying a value of the pulse width of said pulse of said internal RAS signal during a test mode.
A method for operating an encapsulated electrical device, comprising the following steps:
- a) accepting an external RAS signal as an input of the electrical device;
- b) internally generating an internal RAS signal having a pulse in response to said external RAS signal, said pulse of said internal RAS signal meeting a minimum pulse width circuit requirement during a normal operation of the electrical device regardless of a pulse width of a corresponding pulse of said external RAS signal;
- and
- c) accepting an external test signal;
- d) providing an internal test key signal in response to said internal test signal;
- and
- e) decreasing said pulse width of said pulse of said internal RAS signal during a test mode.
A method for operating an encapsulated electrical device, comprising the following steps:
- a) locking out effects of an external RAS signal;
- b) increasing a value of a pulse width of a pulse of an internal RAS signal from a value of a pulse width of a corresponding pulse of said external RAS signal during a normal operation of the electrical device in response to said step of locking out;
- and
- c) decreasing the value of the pulse width of the internal RAS signal during a test mode from the value of the pulse width of the pulse of the internal RAS signal during the normal operation.
Dependencies are inferred from the claim text.