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US 6,587,961 B1Granted
Multi-processor system bridge with controlled access
AssigneeSun Microsystems, Inc.
InventorsPaul J. Garnett, Stephen Rowlinson, Femi A. Oyelakin
Life of this patent
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AssigneeSun Microsystems, Inc.
InventorsPaul J. Garnett, Stephen Rowlinson, Femi A. Oyelakin
Estimating the term…
A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set and a device bus. It also comprises a bridge control mechanism configured to be operable, in an operational mode to permit access by at least one of the first and second processing sets to bridge resources and to the device bus and, in an error mode, to prevent access by the processing sets to the device bus and to permit restricted access to at least one of the processing sets to at least predetermined bridge resources. By providing restricted access to selected parameters held in the bridge during an error mode, the bridge can act as a secure repository for information which can be used by the processing sets to investigate the error and hopefully to recover therefrom, while preventing I/O devices connected to device bus from being corrupted by a faulty processing set. Storage in the bridge provides for buffering data pending resolution of the error.
A bridge for a multi-processor system, the bridge comprising a first processor bus interface for connection to an I/O bus of a first processing set, a second processor bus interface for connection to an I/O bus of a second processing set, a device bus interface for connection to a device bus and a bridge control mechanism configured to be operable:
A bridge for a multi-processor system, the bridge comprising means for connection to an I/O bus of a first processing set, to an I/O bus of a second processing set and to a device bus, and a means for controlling operation of the bridge:
A computer system comprising a first processing set having an I/O bus, a second processing set having an I/O bus, a device bus and a bridge, the bridge being connected to the I/O bus of the first processing set, the I/O bus of the second processing set and the device bus and comprising a bridge control mechanism configured to be operable:
A method of operating a multi-processor system comprising a first processing set having an I/O bus, a second processing set having an I/O bus, a device bus and a bridge, the bridge being connected to the I/O bus of the first processing set, the I/O bus of the second processing set and the device bus, the method comprising selectively operating the bridge:
Dependencies are inferred from the claim text.